soc/mediatek/mt8173: Fix mipi_tx1 address
The address of mipi_tx1 should be MIPI_TX1_BASE instead of MIPI_TX0_BASE. This doesn't cause any issue in practice because mipi_tx1 is unused. Also rename lvds_tx1/lvds_tx2 to lvds_tx0/lvds_tx1 for consistency with the MIPI_TX0_BASE/MIPI_TX1_BASE naming. BUG=none TEST=none BRANCH=none Change-Id: I040b0a2a447333141cf6f4a012fa5d2aefd936c7 Signed-off-by: Yu-Ping Wu <yupingso@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/90444 Reviewed-by: Yidi Lin <yidilin@google.com> Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Chen-Tsung Hsieh <chentsung@google.com>
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2 changed files with 6 additions and 6 deletions
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@ -118,7 +118,7 @@ void mtk_dsi_pin_drv_ctrl(void)
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struct stopwatch sw;
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uint32_t pwr_ack;
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setbits32(&lvds_tx1->vopll_ctl3, RG_DA_LVDSTX_PWR_ON);
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setbits32(&lvds_tx0->vopll_ctl3, RG_DA_LVDSTX_PWR_ON);
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stopwatch_init_usecs_expire(&sw, 1000);
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@ -127,8 +127,8 @@ void mtk_dsi_pin_drv_ctrl(void)
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printk(BIOS_ERR, "enable lvdstx_power failed!!!\n");
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return;
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}
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pwr_ack = read32(&lvds_tx1->vopll_ctl3) & RG_AD_LVDSTX_PWR_ACK;
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pwr_ack = read32(&lvds_tx0->vopll_ctl3) & RG_AD_LVDSTX_PWR_ACK;
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} while (pwr_ack == 0);
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clrbits32(&lvds_tx1->vopll_ctl3, RG_DA_LVDS_ISO_EN);
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clrbits32(&lvds_tx0->vopll_ctl3, RG_DA_LVDS_ISO_EN);
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}
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@ -50,7 +50,7 @@ check_member(mipi_tx_regs, dsi_top_con, 0x40);
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check_member(mipi_tx_regs, dsi_pll_pwr, 0x68);
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static struct mipi_tx_regs *const mipi_tx0 = (void *)MIPI_TX0_BASE;
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static struct mipi_tx_regs *const mipi_tx1 = (void *)MIPI_TX0_BASE;
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static struct mipi_tx_regs *const mipi_tx1 = (void *)MIPI_TX1_BASE;
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/* MIPITX_DSI0_CON */
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enum {
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@ -144,8 +144,8 @@ struct lvds_tx1_regs {
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u32 vopll_ctl3;
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};
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static struct lvds_tx1_regs *const lvds_tx1 = (void *)(MIPI_TX0_BASE + 0x800);
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static struct lvds_tx1_regs *const lvds_tx2 = (void *)(MIPI_TX1_BASE + 0x800);
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static struct lvds_tx1_regs *const lvds_tx0 = (void *)(MIPI_TX0_BASE + 0x800);
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static struct lvds_tx1_regs *const lvds_tx1 = (void *)(MIPI_TX1_BASE + 0x800);
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/* LVDS_VOPLL_CTRL3 */
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enum {
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