From 3f5807ce101cabe88ac528690653fd4901c333cf Mon Sep 17 00:00:00 2001 From: Uwe Poeche Date: Mon, 12 Jan 2026 16:05:25 +0100 Subject: [PATCH] mb/siemens/mc_ehl7: Deactivate SATA interface On this mainboard no SATA interface is assembled. Therefore, it is deactivated. TEST=Boot into OS and verify via lspci if relevant SATA Controller is deactivated and no error in coreboot log is shown. Change-Id: Iea01c30d18d81e67087ac8abef5cece0040087e5 Signed-off-by: Uwe Poeche Reviewed-on: https://review.coreboot.org/c/coreboot/+/90730 Reviewed-by: Mario Scheithauer Tested-by: build bot (Jenkins) --- .../siemens/mc_ehl/variants/mc_ehl7/devicetree.cb | 10 +--------- 1 file changed, 1 insertion(+), 9 deletions(-) diff --git a/src/mainboard/siemens/mc_ehl/variants/mc_ehl7/devicetree.cb b/src/mainboard/siemens/mc_ehl/variants/mc_ehl7/devicetree.cb index da0ce4e292..fcd6de5463 100644 --- a/src/mainboard/siemens/mc_ehl/variants/mc_ehl7/devicetree.cb +++ b/src/mainboard/siemens/mc_ehl/variants/mc_ehl7/devicetree.cb @@ -78,13 +78,7 @@ chip soc/intel/elkhartlake # Determine PCIe root port speed register "PcieRpPcieSpeed[6]" = "2" - # Storage (SATA/SDCARD/EMMC) related UPDs - register "SataSalpSupport" = "0" - register "SataPortsEnable[1]" = "1" - register "SataPortsDevSlp[1]" = "0" - register "SataPortsSSD[1]" = "1" - register "SataSpeed" = "SATA_GEN2" - + # Storage (SDCARD/EMMC) related UPDs register "ScsEmmcHs400Enabled" = "0" register "ScsEmmcDdr50Enabled" = "1" register "SdCardPowerEnableActiveHigh" = "1" @@ -165,8 +159,6 @@ chip soc/intel/elkhartlake device pci 16.0 hidden end # Management Engine Interface 1 - device pci 17.0 on end # SATA - device pci 19.0 on # I2C4 # Add dummy I2C device to limit BUS speed to 100 kHz in OS chip drivers/i2c/generic