broadwell: Update raminit to follow baytrail layout
Make the broadwell raminit function closely resemble the baytrail raminit function. The MRC cache related functions have been split into the common code at soc/intel/common so we can re-use those functions here. The PEI data structure is set up in pei_data.c so we do not need to do any additional configuration of the struct before starting memory training. BUG=chrome-os-partner:28234 TEST=Successfully execute mrc.bin on whitecap mountain 2 board to train memory. Change-Id: Ie1582d61180e9998d8bfe26758b925b0d4a80840 Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/199369 Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Duncan Laurie
chrome-internal-fetch
parent
bb01deb8bb
commit
3f25c23dc5
1 changed files with 74 additions and 123 deletions
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@ -17,147 +17,98 @@
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <console/console.h>
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#include <string.h>
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#include <arch/cbfs.h>
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#include <arch/hlt.h>
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#include <arch/io.h>
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#include <cbmem.h>
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#include <arch/cbfs.h>
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#include <cbfs.h>
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#include <ip_checksum.h>
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#include <pc80/mc146818rtc.h>
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#include <cbmem.h>
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#include <console/console.h>
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#include <device/pci_def.h>
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#include "raminit.h"
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#include "pei_data.h"
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#include "haswell.h"
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#if CONFIG_CHROMEOS
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#include <vendorcode/google/chromeos/chromeos.h>
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#else
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#define recovery_mode_enabled(x) 0
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#include <string.h>
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#if CONFIG_EC_GOOGLE_CHROMEEC
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#include <ec/google/chromeec/ec.h>
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#include <ec/google/chromeec/ec_commands.h>
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#endif
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void save_mrc_data(struct pei_data *pei_data)
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{
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struct mrc_data_container *mrcdata;
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int output_len = ALIGN(pei_data->mrc_output_len, 16);
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/* Save the MRC S3 restore data to cbmem */
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mrcdata = cbmem_add
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(CBMEM_ID_MRCDATA,
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output_len + sizeof(struct mrc_data_container));
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printk(BIOS_DEBUG, "Relocate MRC DATA from %p to %p (%u bytes)\n",
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pei_data->mrc_output, mrcdata, output_len);
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mrcdata->mrc_signature = MRC_DATA_SIGNATURE;
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mrcdata->mrc_data_size = output_len;
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mrcdata->reserved = 0;
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memcpy(mrcdata->mrc_data, pei_data->mrc_output,
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pei_data->mrc_output_len);
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/* Zero the unused space in aligned buffer. */
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if (output_len > pei_data->mrc_output_len)
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memset(mrcdata->mrc_data+pei_data->mrc_output_len, 0,
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output_len - pei_data->mrc_output_len);
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mrcdata->mrc_checksum = compute_ip_checksum(mrcdata->mrc_data,
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mrcdata->mrc_data_size);
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}
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static void prepare_mrc_cache(struct pei_data *pei_data)
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{
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struct mrc_data_container *mrc_cache;
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// preset just in case there is an error
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pei_data->mrc_input = NULL;
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pei_data->mrc_input_len = 0;
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if ((mrc_cache = find_current_mrc_cache()) == NULL) {
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/* error message printed in find_current_mrc_cache */
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return;
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}
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pei_data->mrc_input = mrc_cache->mrc_data;
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pei_data->mrc_input_len = mrc_cache->mrc_data_size;
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printk(BIOS_DEBUG, "%s: at %p, size %x checksum %04x\n",
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__func__, pei_data->mrc_input,
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pei_data->mrc_input_len, mrc_cache->mrc_checksum);
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}
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static const char* ecc_decoder[] = {
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"inactive",
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"active on IO",
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"disabled on IO",
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"active"
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};
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#include <vendorcode/google/chromeos/chromeos.h>
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#include <soc/intel/common/mrc_cache.h>
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#include <broadwell/iomap.h>
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#include <broadwell/pei_data.h>
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#include <broadwell/pei_wrapper.h>
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#include <broadwell/pm.h>
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#include <broadwell/reset.h>
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#include <broadwell/romstage.h>
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#include <broadwell/smm.h>
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#include <broadwell/systemagent.h>
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/*
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* Find PEI executable in coreboot filesystem and execute it.
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*
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* @param pei_data: configuration data for UEFI PEI reference code
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*/
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void sdram_initialize(struct pei_data *pei_data)
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void raminit(struct pei_data *pei_data)
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{
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unsigned long entry;
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const struct mrc_saved_data *cache;
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pei_wrapper_entry_t entry;
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int ret;
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printk(BIOS_DEBUG, "Starting UEFI PEI System Agent\n");
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broadwell_fill_pei_data(pei_data);
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/*
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* Do not pass MRC data in for recovery mode boot,
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* Always pass it in for S3 resume.
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*/
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if (!recovery_mode_enabled() || pei_data->boot_mode == 2)
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prepare_mrc_cache(pei_data);
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/* If MRC data is not found we cannot continue S3 resume. */
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if (pei_data->boot_mode == 2 && !pei_data->mrc_input) {
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if (recovery_mode_enabled()) {
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/* Recovery mode does not use MRC cache */
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printk(BIOS_DEBUG, "Recovery mode: not using MRC cache.\n");
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} else if (!mrc_cache_get_current(&cache)) {
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/* MRC cache found */
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pei_data->saved_data_size = cache->size;
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pei_data->saved_data = &cache->data[0];
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} else if (pei_data->boot_mode == SLEEP_STATE_S3) {
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/* Waking from S3 and no cache. */
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printk(BIOS_DEBUG, "No MRC cache found in S3 resume path.\n");
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post_code(POST_RESUME_FAILURE);
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printk(BIOS_DEBUG, "Giving up in sdram_initialize: "
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"No MRC data\n");
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outb(0x6, 0xcf9);
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while(1) {
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hlt();
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}
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}
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/* Pass console handler in pei_data */
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pei_data->tx_byte = console_tx_byte;
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/* Locate and call UEFI System Agent binary. */
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entry = (unsigned long)cbfs_get_file_content(
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CBFS_DEFAULT_MEDIA, "mrc.bin", 0xab);
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if (entry) {
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int rv;
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asm volatile (
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"call *%%ecx\n\t"
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:"=a" (rv) : "c" (entry), "a" (pei_data));
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if (rv) {
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switch (rv) {
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case -1:
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printk(BIOS_ERR, "PEI version mismatch.\n");
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break;
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case -2:
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printk(BIOS_ERR, "Invalid memory frequency.\n");
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break;
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default:
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printk(BIOS_ERR, "MRC returned %x.\n", rv);
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}
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die("Nonzero MRC return value.\n");
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}
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reset_system();
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} else {
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die("UEFI PEI System Agent not found.\n");
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printk(BIOS_DEBUG, "No MRC cache found.\n");
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#if CONFIG_EC_GOOGLE_CHROMEEC
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if (pei_data->boot_mode == SLEEP_STATE_S0) {
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/* Ensure EC is running RO firmware. */
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google_chromeec_check_ec_image(EC_IMAGE_RO);
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}
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#endif
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}
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/* For reference print the System Agent version
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* after executing the UEFI PEI stage.
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*/
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u32 version = MCHBAR32(0x5034);
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printk(BIOS_DEBUG, "System Agent Version %d.%d.%d Build %d\n",
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/* Determine if mrc.bin is in the cbfs. */
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entry = (pei_wrapper_entry_t)cbfs_get_file_content(
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CBFS_DEFAULT_MEDIA, "mrc.bin", 0xab);
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if (entry == NULL) {
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printk(BIOS_DEBUG, "Couldn't find mrc.bin\n");
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return;
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}
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printk(BIOS_DEBUG, "Starting Memory Reference Code\n");
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ret = entry(pei_data);
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if (ret < 0)
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die("pei_data version mismatch\n");
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/* Print the MRC version after executing the UEFI PEI stage. */
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u32 version = MCHBAR32(MCHBAR_PEI_VERSION);
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printk(BIOS_DEBUG, "MRC Version %d.%d.%d Build %d\n",
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version >> 24 , (version >> 16) & 0xff,
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(version >> 8) & 0xff, version & 0xff);
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report_memory_config();
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}
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if (pei_data->boot_mode != SLEEP_STATE_S3) {
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cbmem_initialize_empty();
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} else if (cbmem_initialize()) {
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#if CONFIG_HAVE_ACPI_RESUME
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printk(BIOS_DEBUG, "Failed to recover CBMEM in S3 resume.\n");
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/* Failed S3 resume, reset to come up cleanly */
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reset_system();
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#endif
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}
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printk(BIOS_DEBUG, "MRC data at %p %d bytes\n", pei_data->data_to_save,
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pei_data->data_to_save_size);
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if (pei_data->data_to_save != NULL && pei_data->data_to_save_size > 0)
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mrc_cache_stash_data(pei_data->data_to_save,
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pei_data->data_to_save_size);
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}
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