erebion/coreboot
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initial post of 0x01 for motherboard timing issues.

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count=1 on the dd for the payload so it won't grow without bound.
This commit is contained in:
Ronald G. Minnich 2002-07-29 17:19:31 +00:00
commit 3dfb12a37a
2 changed files with 3 additions and 1 deletions
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2
src/arch/i386/config/crt0.base
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@ -18,6 +18,8 @@
.section ".rom.data", "a", @progbits
.section ".rom.text", "ax", @progbits
intel_chip_post_macro(0x01) /* delay for chipsets */
#include "crt0_includes.h"
CONSOLE_DEBUG_TX_STRING($str_after_ram)

2
src/arch/i386/config/make.base
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@ -32,7 +32,7 @@ addaction linuxbios.rom echo $$size ; \
addaction linuxbios.rom dd if=linuxbios.strip of=linuxbios.rom bs=1 seek=`expr $(ROM_IMAGE_SIZE) - $$size`
makerule payload.block : $(if $(PAYLOAD),$(PAYLOAD), linux.bin.gz) ; dd conv=sync bs=$(PAYLOAD_SIZE) if=$< of=$@
makerule payload.block : $(if $(PAYLOAD),$(PAYLOAD), linux.bin.gz) ; dd conv=sync bs=$(PAYLOAD_SIZE) count=1 if=$< of=$@
makerule linux.bin.gz: linux.bin ;gzip -f -3 linux.bin
makerule linux.bin: $(LINUX) ; objcopy -O binary -R .note -R .comment -S $< $@