From 3dae427ac51a97f76874335d56a1a751f8f29177 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Micha=C5=82=20Kope=C4=87?= Date: Thu, 6 Mar 2025 13:04:32 +0100 Subject: [PATCH] mb/novacustom/mtl-h/var/igpu: Add power limits MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Set PL4 to the wattage of the included AC adapter. The EC will override this limit at runtime, if necessary (for example, if a weaker USB-PD power supply is connected). PsysPmax is set according to the board schematics (RPsys resistor), which ensures that the Psys signal generated by the battery charger and interpreted by SOC VRs is interpreted correctly and that Psys power limits applied by the EC work as expected. Change-Id: I56e9c20556553940c308150f7e470628f56c3991 Signed-off-by: Michał Kopeć Reviewed-on: https://review.coreboot.org/c/coreboot/+/86752 Tested-by: build bot (Jenkins) Reviewed-by: Michał Żygowski --- .../novacustom/mtl-h/variants/igpu/overridetree.cb | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/src/mainboard/novacustom/mtl-h/variants/igpu/overridetree.cb b/src/mainboard/novacustom/mtl-h/variants/igpu/overridetree.cb index f6a32c05cc..1f78915e0c 100644 --- a/src/mainboard/novacustom/mtl-h/variants/igpu/overridetree.cb +++ b/src/mainboard/novacustom/mtl-h/variants/igpu/overridetree.cb @@ -1,4 +1,16 @@ chip soc/intel/meteorlake + # Power limits, + # PsysPL2, PsysPL3, PL4 are configured by EC at runtime + register "power_limits_config[MTL_P_682_482_CORE]" = "{ + .tdp_pl1_override = 35, + .tdp_pl2_override = 64, + .tdp_pl4 = 90, + .psys_pmax = 99, + }" + + # MTL SOC has additional setting for PsysPmax + register "psys_pmax_watts" = "99" + device domain 0 on subsystemid 0x1558 0xa743 inherit device ref igpu on