From 3dabe4f857aa2a1cc1dc199ea75ca14d4d45ea31 Mon Sep 17 00:00:00 2001
From: Tony Huang <tony-huang@quanta.corp-partner.google.com>
Date: Wed, 19 Nov 2025 16:15:58 +0800
Subject: [PATCH] mb/google/brox/var/caboc: Increase I2C0 touchpad tHD to 0.53
 us

Increase I2C0 touchpad tHD to 0.53 us by adjusting data_hold_time_ns in
I2C0 from 50 to 250, the new tHD meets SPEC between 0.3 us and 0.9 us.

The setting format is copied from baseboard/brox and modify I2C0.

BUG=b:461977573
TEST=emerge-brox coreboot
     checked TP function work
     measure the wave form meets SPEC
     Before: tHD  ~0.072 us
     After:  tHD  ~0.53 us

Change-Id: I2841107a9165fc0eacc465fe5013d23856a3f755
Signed-off-by: Tony Huang <tony-huang@quanta.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/90114
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <ericllai@google.com>
Reviewed-by: Wisley Chen <wisley.chen@quanta.corp-partner.google.com>
---
 .../brox/variants/caboc/overridetree.cb       | 39 +++++++++++++++++++
 1 file changed, 39 insertions(+)

diff --git a/src/mainboard/google/brox/variants/caboc/overridetree.cb b/src/mainboard/google/brox/variants/caboc/overridetree.cb
index 575b865205..6cf5defcdc 100644
--- a/src/mainboard/google/brox/variants/caboc/overridetree.cb
+++ b/src/mainboard/google/brox/variants/caboc/overridetree.cb
@@ -45,6 +45,45 @@ chip soc/intel/alderlake
 
 	register "platform_pmax" = "208"
 
+	# Intel Common SoC Config
+	#+-------------------+---------------------------+
+	#| Field             |  Value                    |
+	#+-------------------+---------------------------+
+	#| I2C0              | Trackpad                  |
+	#| I2C1              | Touchscreen               |
+	#| I2C2              | ISH Sensor                |
+	#| I2C4              | cr50 TPM. Early init is   |
+	#|                   | required to set up a BAR  |
+	#|                   | for TPM communication     |
+	#+-------------------+---------------------------+
+	register "common_soc_config" = "{
+		.i2c[0] = {
+			.speed = I2C_SPEED_FAST,
+			.rise_time_ns = 650,
+			.fall_time_ns = 330,
+			.data_hold_time_ns = 250,
+		},
+		.i2c[1] = {
+			.speed = I2C_SPEED_FAST,
+			.rise_time_ns = 600,
+			.fall_time_ns = 350,
+			.data_hold_time_ns = 50,
+		},
+		.i2c[2] = {
+			.speed = I2C_SPEED_FAST,
+			.rise_time_ns = 600,
+			.fall_time_ns = 400,
+			.data_hold_time_ns = 50,
+		},
+		.i2c[4] = {
+			.early_init = 1,
+			.speed = I2C_SPEED_FAST,
+			.rise_time_ns = 650,
+			.fall_time_ns = 400,
+			.data_hold_time_ns = 50,
+		},
+	}"
+
 	device domain 0 on
 		device ref dtt on
 			chip drivers/intel/dptf