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soc/amd/phoenix/chipset_*: Enable gpp_bridge_[a/b/c] by default

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Since FSP doesn't support disabling bridges and has no UPDs for that,
they must be enabled in DT to make sure they are properly initialized
during PCI enumeration as expected by the payload (EDK2 for example).
It might be OK to have them set to off when all devices behind the
bridge are also off and FSP disables those secondary devices.

In general something that cannot be hidden/shut off shouldn't be marked
as such, as later stages (payload/OS) might find it active, but
unconfigured.

Change-Id: Ic226fd93b431467c7fa3a53140102ff4fd327f40
Signed-off-by: Maximilian Brune <maximilian.brune@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/86271
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Maximilian Brune 2025-02-04 15:48:54 +01:00 • committed by Matt DeVillier
commit 3d07c761f7
3 changed files with 7 additions and 6 deletions
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1
src/mainboard/google/myst/variants/baseboard/devicetree.cb
View file

@ -310,6 +310,7 @@ chip soc/amd/phoenix
device ref acp on end # Audio Processor (ACP)
device ref mp2 on end # Sensor Fusion Hub (MP2)
end
device ref gpp_bridge_b off end # Internal GPP Bridge 1 to Bus B
device ref gpp_bridge_c on # Internal GPP Bridge 2 to Bus C
device ref usb4_xhci_0 on
chip drivers/usb/acpi

6
src/soc/amd/phoenix/chipset_fsp.cb
View file

@ -30,7 +30,7 @@ chip soc/amd/phoenix
device pci 04.1 alias usb4_pcie_bridge_1 off end
device pci 08.0 on end # Dummy device function, do not disable
device pci 08.1 alias gpp_bridge_a off # Internal GPP Bridge 0 to Bus A
device pci 08.1 alias gpp_bridge_a on # Internal GPP Bridge 0 to Bus A
ops amd_internal_pcie_gpp_ops
device pci 0.0 alias gfx off ops amd_graphics_ops end # Internal GPU (GFX)
device pci 0.1 alias gfx_hda off end # Display HD Audio Controller (GFXAZ)
@ -82,13 +82,13 @@ chip soc/amd/phoenix
device pci 0.6 alias hda off end # Audio Processor HD Audio Controller (main AZ)
device pci 0.7 alias mp2 off end # Sensor Fusion Hub (MP2)
end
device pci 08.2 alias gpp_bridge_b off # Internal GPP Bridge 1 to Bus B
device pci 08.2 alias gpp_bridge_b on # Internal GPP Bridge 1 to Bus B
ops amd_internal_pcie_gpp_ops
device pci 0.0 on end # dummy, do not disable
device pci 0.1 alias ipu off end
end
device pci 08.3 alias gpp_bridge_c off # Internal GPP Bridge 2 to Bus C
device pci 08.3 alias gpp_bridge_c on # Internal GPP Bridge 2 to Bus C
ops amd_internal_pcie_gpp_ops
device pci 0.0 on end # dummy, do not disable
device pci 0.3 alias usb4_xhci_0 off

6
src/soc/amd/phoenix/chipset_opensil.cb
View file

@ -50,7 +50,7 @@ chip soc/amd/phoenix
device pci 04.1 alias usb4_pcie_bridge_1 off end
device pci 08.0 on end # Dummy device function, do not disable
device pci 08.1 alias gpp_bridge_a off # Internal GPP Bridge 0 to Bus A
device pci 08.1 alias gpp_bridge_a on # Internal GPP Bridge 0 to Bus A
ops amd_internal_pcie_gpp_ops
device pci 0.0 alias gfx off ops amd_graphics_ops end # Internal GPU (GFX)
device pci 0.1 alias gfx_hda off end # Display HD Audio Controller (GFXAZ)
@ -102,13 +102,13 @@ chip soc/amd/phoenix
device pci 0.6 alias hda off end # Audio Processor HD Audio Controller (main AZ)
device pci 0.7 alias mp2 off end # Sensor Fusion Hub (MP2)
end
device pci 08.2 alias gpp_bridge_b off # Internal GPP Bridge 1 to Bus B
device pci 08.2 alias gpp_bridge_b on # Internal GPP Bridge 1 to Bus B
ops amd_internal_pcie_gpp_ops
device pci 0.0 on end # dummy, do not disable
device pci 0.1 alias ipu off end
end
device pci 08.3 alias gpp_bridge_c off # Internal GPP Bridge 2 to Bus C
device pci 08.3 alias gpp_bridge_c on # Internal GPP Bridge 2 to Bus C
ops amd_internal_pcie_gpp_ops
device pci 0.0 on end # dummy, do not disable
device pci 0.3 alias usb4_xhci_0 off