UPSTREAM: google/jecht: add board-specific USB port info

Add capability and location data for USB ports/devices via
_PLD and _UPC ACPI methods, which is utilized by Windows and
required by macOS.

Each jecht variant has a different USB port config.

BUG=none
BRANCH=none
TEST=none

Change-Id: I10e318e7bb6ea6ee3f4b0d5c210c4c7d639adce4
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: f069edb975
Original-Change-Id: I3b15aac9c4971e2ae230106016fba3a583ec6c9a
Original-Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Original-Reviewed-on: https://review.coreboot.org/19971
Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Original-Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://chromium-review.googlesource.com/524596

src/mainboard/google/jecht/acpi/mainboard.asl

@@ -67,3 +67,6 @@ Scope (\_SB.PCI0.RP02)
 		}
 	}
 }
+
+/* USB port entries */
+#include <variant/acpi/usb.asl>

src/mainboard/google/jecht/variants/rikku/include/variant/acpi/usb.asl

@@ -0,0 +1,160 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+Scope (\_SB.PCI0.XHCI.HUB7.PRT2)
+{
+	// Front Top USB 2.0
+	Name (_UPC, Package (0x04)
+	{
+		0xFF,	// Connectable
+		Zero,	// USB Port
+		Zero,	// Reserved
+		Zero	// Reserved
+	})
+
+	// Visible
+	Method (_PLD, 0, NotSerialized)
+	{
+		Return (GPLD (One))
+	}
+}
+Scope (\_SB.PCI0.XHCI.HUB7.PRT3)
+{
+	// Front Bottom USB 2.0
+	Name (_UPC, Package (0x04)
+	{
+		0xFF,	// Connectable
+		Zero,	// USB Port
+		Zero,	// Reserved
+		Zero	// Reserved
+	})
+
+	// Visible
+	Method (_PLD, 0, NotSerialized)
+	{
+		Return (GPLD (One))
+	}
+}
+Scope (\_SB.PCI0.XHCI.HUB7.PRT4)
+{
+	// Bluetooth
+	Name (_UPC, Package (0x04)
+	{
+		0xFF,	// Connectable
+		0xFF,	// OEM Connector
+		Zero,	// Reserved
+		Zero	// Reserved
+	})
+
+	// Not Visible
+	Method (_PLD, 0, NotSerialized)
+	{
+		Return (GPLD (Zero))
+	}
+}
+Scope (\_SB.PCI0.XHCI.HUB7.PRT5)
+{
+	// Back Right USB 2.0
+	Name (_UPC, Package (0x04)
+	{
+		0xFF,	// Connectable
+		Zero,	// USB Port
+		Zero,	// Reserved
+		Zero	// Reserved
+	})
+
+	// Visible
+	Method (_PLD, 0, NotSerialized)
+	{
+		Return (GPLD (One))
+	}
+}
+Scope (\_SB.PCI0.XHCI.HUB7.PRT6)
+{
+	// Back Left USB 2.0
+	Name (_UPC, Package (0x04)
+	{
+		0xFF,	// Connectable
+		Zero,	// USB Port
+		Zero,	// Reserved
+		Zero	// Reserved
+	})
+
+	// Visible
+	Method (_PLD, 0, NotSerialized)
+	{
+		Return (GPLD (One))
+	}
+}
+Scope (\_SB.PCI0.XHCI.HUB7.PRT7)
+{
+	// SD Card
+	// Connected, OEM Connector, Reserved, Reserved
+	Name (_UPC, Package (0x04)
+	{
+		0xFF,	// Connectable
+		0xFF,	// OEM Connector
+		Zero,	// Reserved
+		Zero	// Reserved
+	})
+
+	// Not Visible
+	Method (_PLD, 0, NotSerialized)
+	{
+		Return (GPLD (Zero))
+	}
+}
+Scope (\_SB.PCI0.XHCI.HUB7.SSP3)
+{
+	// Front Top USB 3.0
+	Name (_UPC, Package (0x04)
+	{
+		0xFF,	// Connectable
+		0x03,	// USB 3.0 Port
+		Zero,	// Reserved
+		Zero	// Reserved
+	})
+}
+Scope (\_SB.PCI0.XHCI.HUB7.SSP4)
+{
+	// Front Bottom USB 3.0
+	Name (_UPC, Package (0x04)
+	{
+		0xFF,	// Connectable
+		0x03,	// USB 3.0 Port
+		Zero,	// Reserved
+		Zero	// Reserved
+	})
+}
+Scope (\_SB.PCI0.XHCI.HUB7.SSP5)
+{
+	// Back Right USB 3.0
+	Name (_UPC, Package (0x04)
+	{
+		0xFF,	// Connectable
+		0x03,	// USB 3.0 Port
+		Zero,	// Reserved
+		Zero	// Reserved
+	})
+}
+Scope (\_SB.PCI0.XHCI.HUB7.SSP6)
+{
+	// Back Left USB 3.0
+	Name (_UPC, Package (0x04)
+	{
+		0xFF,	// Connectable
+		0x03,	// USB 3.0 Port
+		Zero,	// Reserved
+		Zero	// Reserved
+	})
+}