cosmos: enable SOC uart driver

Add necessary configuration to enable the inclusion of the UART driver
into the image when serial console is enabled.

BRANCH=none
BUG=chrome-os-partner:32631
TEST=building with serial console enabled includes the skeleton uart
     driver into the build

Change-Id: I6cbd110f600169021901b3f864d596404587fbcc
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/223598
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Vadim Bendebury 2014-10-15 16:32:05 -07:00 committed by chrome-internal-fetch
commit 3b49c25891
2 changed files with 6 additions and 0 deletions

View file

@ -30,6 +30,8 @@ config SOC_MARVELL_BG4CD
select EARLY_CONSOLE
select GENERIC_UDELAY
select HAVE_MONOTONIC_TIMER
select HAVE_UART_MEMORY_MAPPED
select HAVE_UART_SPECIAL
if SOC_MARVELL_BG4CD

View file

@ -22,21 +22,25 @@ bootblock-y += cbmem.c
bootblock-y += i2c.c
bootblock-y += media.c
bootblock-y += monotonic_timer.c
bootblock-$(CONFIG_CONSOLE_SERIAL) += uart.c
verstage-y += i2c.c
verstage-y += media.c
verstage-y += monotonic_timer.c
verstage-$(CONFIG_CONSOLE_SERIAL) += uart.c
romstage-y += cbmem.c
romstage-y += i2c.c
romstage-y += media.c
romstage-y += monotonic_timer.c
romstage-y += sdram.c
romstage-$(CONFIG_CONSOLE_SERIAL) += uart.c
ramstage-y += cbmem.c
ramstage-y += i2c.c
ramstage-y += media.c
ramstage-y += monotonic_timer.c
ramstage-$(CONFIG_CONSOLE_SERIAL) += uart.c
$(objcbfs)/bootblock.raw.elf: $(objcbfs)/bootblock.elf
cp $< $@