diff --git a/src/soc/mediatek/common/dp/dptx_hal_v2.c b/src/soc/mediatek/common/dp/dptx_hal_v2.c
index 0833f2de62..628af99112 100644
--- a/src/soc/mediatek/common/dp/dptx_hal_v2.c
+++ b/src/soc/mediatek/common/dp/dptx_hal_v2.c
@@ -339,3 +339,12 @@ void dptx_hal_phy_set_idle_pattern(struct mtk_dp *mtk_dp, u8 lane_count, bool en
 	mtk_dp_mask(mtk_dp, REG_3580_DP_TRANS_P0, (enable ? val : 0x0) << 8,
 		    POST_MISC_DATA_LANE_OV_DP_TRANS_4P_MASK);
 }
+
+void dptx_hal_phyd_reset(struct mtk_dp *mtk_dp)
+{
+	mtk_dp_phy_mask(mtk_dp, DP_PHY_DIG_SW_RST, 0, BIT(0));
+	udelay(10);
+	mtk_dp_phy_mask(mtk_dp, DP_PHY_DIG_SW_RST, BIT(0), BIT(0));
+
+	dptx_hal_reset_swing_preemphasis(mtk_dp);
+}
diff --git a/src/soc/mediatek/mt8189/dptx_hal.c b/src/soc/mediatek/mt8189/dptx_hal.c
index 552f79b7cd..3fa3955f55 100644
--- a/src/soc/mediatek/mt8189/dptx_hal.c
+++ b/src/soc/mediatek/mt8189/dptx_hal.c
@@ -26,12 +26,3 @@ void dptx_hal_phy_set_lanes(struct mtk_dp *mtk_dp, u8 lane_count)
 	mtk_dp_phy_mask(mtk_dp, PHYD_DIG_GLB_OFFSET + 0x44,
 			GENMASK(4 + lane_count - 1, 4), GENMASK(7, 4));
 }
-
-void dptx_hal_phyd_reset(struct mtk_dp *mtk_dp)
-{
-	mtk_dp_phy_mask(mtk_dp, DP_PHY_DIG_SW_RST, 0, BIT(0));
-	udelay(10);
-	mtk_dp_phy_mask(mtk_dp, DP_PHY_DIG_SW_RST, BIT(0), BIT(0));
-
-	dptx_hal_reset_swing_preemphasis(mtk_dp);
-}
diff --git a/src/soc/mediatek/mt8196/dptx_hal.c b/src/soc/mediatek/mt8196/dptx_hal.c
index 110f5f1ada..9fe8571231 100644
--- a/src/soc/mediatek/mt8196/dptx_hal.c
+++ b/src/soc/mediatek/mt8196/dptx_hal.c
@@ -18,24 +18,3 @@ void dptx_hal_phy_set_lanes(struct mtk_dp *mtk_dp, u8 lane_count)
 	for (int i = 0; i < lane_count; i++)
 		mtk_dp_phy_mask(mtk_dp, PHYD_DIG_GLB_OFFSET + 0x74, BIT(i), BIT(i));
 }
-
-void dptx_hal_phyd_reset(struct mtk_dp *mtk_dp)
-{
-	u32 val;
-
-	mtk_dp_phy_mask(mtk_dp, DP_PHY_DIG_SW_RST, 0, BIT(0));
-	udelay(10);
-	mtk_dp_phy_mask(mtk_dp, DP_PHY_DIG_SW_RST, BIT(0), BIT(0));
-	val = mtk_dp_phy_read(mtk_dp, DP_PHY_DIG_TX_CTL_0) & 0xF;
-	printk(BIOS_DEBUG, "[eDPTX] DP_PHY_DIG_TX_CTL_0:%#x\n", val);
-
-	while (val > 0) {
-		val >>= 1;
-		mtk_dp_phy_mask(mtk_dp, DP_PHY_DIG_TX_CTL_0, val, 0xF);
-		printk(BIOS_DEBUG, "[eDPTX] DP_PHY_DIG_TX_CTL_0:%#x\n", val);
-	}
-	printk(BIOS_DEBUG, "[eDPTX] DP_PHY_DIG_TX_CTL_0:%#x\n",
-	       mtk_dp_phy_read(mtk_dp, DP_PHY_DIG_TX_CTL_0));
-
-	dptx_hal_reset_swing_preemphasis(mtk_dp);
-}