Add EM100 'hyper term' spi console support in ramstage & smm

The EM100Pro allows the debug console to be sent over the SPI bus.
This is not yet working in romstage due to the use of static variables
in the SPI driver code.  It is also not working on chipsets that have
SPI write buffers of less than 10 characters due to the 9 byte
command/header length specified by the EM100 protocol.

While this currently works only with the EM100, it seems like it would
be useful on any logic analyzer with SPI debug - just filter on command
bytes of 0x11.

Change-Id: Icd42ccd96cab0a10a4e70f4b02ecf9de8169564b
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: http://review.coreboot.org/11743
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>

src/soc/intel/baytrail/Kconfig

@@ -36,6 +36,7 @@ config CPU_SPECIFIC_OPTIONS
 	select UDELAY_TSC
 	select SOC_INTEL_COMMON
 	select HAVE_INTEL_FIRMWARE
+	select HAVE_SPI_CONSOLE_SUPPORT
 
 config BOOTBLOCK_CPU_INIT
 	string

src/soc/intel/braswell/Kconfig

@@ -49,6 +49,7 @@ config CPU_SPECIFIC_OPTIONS
 	select UDELAY_TSC
 	select USE_GENERIC_FSP_CAR_INC
 	select HAVE_INTEL_FIRMWARE
+	select HAVE_SPI_CONSOLE_SUPPORT
 
 config BOOTBLOCK_CPU_INIT
 	string

src/soc/intel/broadwell/Kconfig

@@ -43,6 +43,7 @@ config CPU_SPECIFIC_OPTIONS
 	select SOC_INTEL_COMMON
 	select HAVE_INTEL_FIRMWARE
 	select SOC_INTEL_COMMON_ACPI_WAKE_SOURCE
+	select HAVE_SPI_CONSOLE_SUPPORT
 
 config BOOTBLOCK_CPU_INIT
 	string

src/soc/intel/fsp_baytrail/Kconfig

@@ -48,6 +48,7 @@ config CPU_SPECIFIC_OPTIONS
 	select UDELAY_TSC
 	select SUPPORT_CPU_UCODE_IN_CBFS
 	select HAVE_INTEL_FIRMWARE
+	select HAVE_SPI_CONSOLE_SUPPORT
 
 config SOC_INTEL_FSP_BAYTRAIL_MD
 	bool