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UPSTREAM: soc/intel/skylake: Cache the MMIO BIOS region

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If the boot media is memory mapped temporarily mark it as write
protect MTRR type so that memory-mapped accesses are faster.

Depthcharge payload loading was sped up by 75ms using this.

BUG=none
BRANCH=none
TEST=none

Change-Id: Icca415dceef9b20728294a890e908905e4208636
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Original-Commit-Id: 93d5f40be5
Original-Change-Id: Ice217561bb01a43ba520ce51e03d81979f317343
Original-Signed-off-by: Barnali Sarkar <barnali.sarkar@intel.com>
Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-on: https://review.coreboot.org/20089
Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Original-Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/531702
Commit-Ready: Patrick Georgi <pgeorgi@chromium.org>
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
This commit is contained in:
Aaron Durbin 2017-06-08 11:00:23 -05:00 • committed by chrome-bot
commit 3a53088e61
1 changed files with 7 additions and 0 deletions
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7
src/soc/intel/skylake/cpu.c
View file

@ -34,6 +34,7 @@
#include <cpu/x86/name.h>
#include <cpu/x86/smm.h>
#include <delay.h>
#include <intelblocks/fast_spi.h>
#include <pc80/mc146818rtc.h>
#include <soc/cpu.h>
#include <soc/msr.h>
@ -569,6 +570,12 @@ static void soc_post_cpus_init(void *unused)
{
if (mp_run_on_all_cpus(&x86_setup_mtrrs_with_detect, 1000) < 0)
printk(BIOS_ERR, "MTRR programming failure\n");
/* Temporarily cache the memory-mapped boot media. */
if (IS_ENABLED(CONFIG_BOOT_DEVICE_MEMORY_MAPPED) &&
IS_ENABLED(CONFIG_BOOT_DEVICE_SPI_FLASH))
fast_spi_cache_bios_region();
x86_mtrr_check();
}