baytrail: initialize HDA device and HDMI codec
In order to play audio through a HDMI cable the
HDA device needs to be initialized and a the
verb table set up for the HDMI codec. Do this if
the HDA device is enabled.
BUG=chrome-os-partner:24908
BRANCH=baytrail
TEST=Built and booted with kernel changes to handle
baytrail hdmi codec. Benson confirmed sound
does come through hdmi.
Change-Id: I106fd20d8442a7ad7a47a144a1584eb311a0a583
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/184710
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
This commit is contained in:
parent
52bec10986
commit
3931987050
4 changed files with 415 additions and 0 deletions
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@ -49,6 +49,8 @@ ramstage-y += perf_power.c
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ramstage-y += stage_cache.c
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romstage-y += stage_cache.c
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ramstage-$(CONFIG_ELOG) += elog.c
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ramstage-y += hda.c
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ramstage-y += hda_verb.c
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# Remove as ramstage gets fleshed out
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ramstage-y += placeholders.c
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39
src/soc/intel/baytrail/baytrail/hda_verb.h
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39
src/soc/intel/baytrail/baytrail/hda_verb.h
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@ -0,0 +1,39 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2013 Google Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#ifndef BAYTRAIL_HDA_VERB_H
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#define BAYTRAIL_HDA_VERB_H
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#include <stdint.h>
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#define HDA_GCAP_REG 0x00
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#define HDA_GCTL_REG 0x08
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#define HDA_GCTL_CRST (1 << 0)
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#define HDA_STATESTS_REG 0x0e
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#define HDA_IC_REG 0x60
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#define HDA_IR_REG 0x64
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#define HDA_ICII_REG 0x68
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#define HDA_ICII_BUSY (1 << 0)
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#define HDA_ICII_VALID (1 << 1)
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int hda_codec_detect(u32 base);
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int hda_codec_write(u32 base, u32 size, const u32 *data);
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int hda_codec_init(u32 base, int addr, int verb_size, const u32 *verb_data);
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#endif
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121
src/soc/intel/baytrail/hda.c
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121
src/soc/intel/baytrail/hda.c
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@ -0,0 +1,121 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2014 Google Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <arch/io.h>
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#include <console/console.h>
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#include <device/device.h>
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#include <device/pci.h>
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#include <device/pci_def.h>
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#include <device/pci_ids.h>
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#include <reg_script.h>
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#include <baytrail/hda_verb.h>
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#include <baytrail/iomap.h>
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#include <baytrail/iosf.h>
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#include <baytrail/pci_devs.h>
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#include <baytrail/ramstage.h>
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static const struct reg_script init_ops[] = {
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/* Set up VC0 and VC1. */
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REG_MMIO_WRITE32(RCBA_BASE_ADDRESS + 0x24, 0x80000019),
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REG_MMIO_WRITE32(RCBA_BASE_ADDRESS + 0x28, 0x81000022),
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/* Enable VCi */
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REG_PCI_WRITE32(0x120, 0x81000022),
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/* Enable no snoop traffic. */
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REG_PCI_OR16(0x78, 1 << 11),
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/* Configure HDMI codec connection. */
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REG_PCI_OR32(0xc4, 1 << 1),
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REG_PCI_OR8(0x43, (1 << 3) | (1 << 6)),
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REG_IOSF_WRITE(IOSF_PORT_PMC, PUNIT_PWRGT_CONTROL, 0xc0),
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REG_IOSF_WRITE(IOSF_PORT_PMC, PUNIT_PWRGT_CONTROL, 0x00),
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/* Configure internal settings. */
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REG_PCI_OR32(0xc0, 0x7 << 21),
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REG_PCI_OR32(0xc4, (0x3 << 26) | (1 << 13) | (1 << 10)),
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REG_PCI_WRITE32(0xc8, 0x82a30000),
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REG_PCI_RMW32(0xd0, ~(1 << 31), 0x0),
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/* Disable docking. */
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REG_PCI_RMW8(0x4d, ~(1 << 7), 0),
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REG_SCRIPT_END,
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};
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static const uint32_t hdmi_codec_verb_table[] = {
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/* coreboot specific header */
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0x80862882, /* vid did for hdmi codec */
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0x00000000, /* subsystem id */
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0x00000003, /* number of jacks */
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/* pin widget 5 - port B */
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0x20471c10,
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0x20471d00,
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0x20471e56,
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0x20471f18,
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/* pin widget 6 - port C */
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0x20571c20,
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0x20571d00,
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0x20571e56,
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0x20571f18,
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/* pin widget 7 - port D */
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0x20671c30,
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0x20671d00,
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0x20671e56,
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0x20671f58,
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};
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static void hda_init(device_t dev)
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{
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struct resource *res;
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int codec_mask;
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int i;
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reg_script_run_on_dev(dev, init_ops);
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res = find_resource(dev, PCI_BASE_ADDRESS_0);
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if (res == NULL)
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return;
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codec_mask = hda_codec_detect(res->base);
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printk(BIOS_DEBUG, "codec mask = %x\n", codec_mask);
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if (!codec_mask)
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return;
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for (i = 3; i >= 0; i--) {
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if (!((1 << i) & codec_mask))
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continue;
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hda_codec_init(res->base, i, sizeof(hdmi_codec_verb_table),
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hdmi_codec_verb_table);
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}
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}
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static const struct device_operations device_ops = {
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.read_resources = pci_dev_read_resources,
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.set_resources = pci_dev_set_resources,
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.enable_resources = pci_dev_enable_resources,
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.init = hda_init,
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.enable = NULL,
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.scan_bus = NULL,
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.ops_pci = &soc_pci_ops,
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};
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static const struct pci_driver southcluster __pci_driver = {
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.ops = &device_ops,
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.vendor = PCI_VENDOR_ID_INTEL,
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.device = HDA_DEVID,
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};
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253
src/soc/intel/baytrail/hda_verb.c
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253
src/soc/intel/baytrail/hda_verb.c
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@ -0,0 +1,253 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2008 Advanced Micro Devices, Inc.
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* Copyright (C) 2008-2009 coresystems GmbH
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* Copyright (C) 2011 Google Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <console/console.h>
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#include <arch/io.h>
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#include <delay.h>
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#include <baytrail/hda_verb.h>
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/**
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* Set bits in a register and wait for status
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*/
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static int set_bits(u32 port, u32 mask, u32 val)
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{
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u32 reg32;
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int count;
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/* Write (val & mask) to port */
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val &= mask;
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reg32 = read32(port);
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reg32 &= ~mask;
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reg32 |= val;
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write32(port, reg32);
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/* Wait for readback of register to
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* match what was just written to it
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*/
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count = 50;
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do {
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/* Wait 1ms based on BKDG wait time */
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mdelay(1);
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reg32 = read32(port);
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reg32 &= mask;
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} while ((reg32 != val) && --count);
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/* Timeout occurred */
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if (!count)
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return -1;
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return 0;
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}
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/**
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* Probe for supported codecs
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*/
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int hda_codec_detect(u32 base)
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{
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u8 reg8;
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/* Set Bit 0 to 1 to exit reset state (BAR + 0x8)[0] */
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if (set_bits(base + HDA_GCTL_REG, HDA_GCTL_CRST, HDA_GCTL_CRST) < 0)
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goto no_codec;
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/* Write back the value once reset bit is set. */
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write16(base + HDA_GCAP_REG, read16(base + HDA_GCAP_REG));
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/* Read in Codec location (BAR + 0xe)[2..0]*/
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reg8 = read8(base + HDA_STATESTS_REG);
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reg8 &= 0x0f;
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if (!reg8)
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goto no_codec;
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return reg8;
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no_codec:
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/* Codec Not found */
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/* Put HDA back in reset (BAR + 0x8) [0] */
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set_bits(base + HDA_GCTL_REG, HDA_GCTL_CRST, 0);
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printk(BIOS_DEBUG, "HDA: No codec!\n");
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return 0;
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}
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/**
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* Wait 50usec for the codec to indicate it is ready
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* no response would imply that the codec is non-operative
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*/
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static int hda_wait_for_ready(u32 base)
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{
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/* Use a 50 usec timeout - the Linux kernel uses the
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* same duration */
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int timeout = 50;
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while(timeout--) {
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u32 reg32 = read32(base + HDA_ICII_REG);
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if (!(reg32 & HDA_ICII_BUSY))
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return 0;
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udelay(1);
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}
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return -1;
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}
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/**
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* Wait 50usec for the codec to indicate that it accepted
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* the previous command. No response would imply that the code
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* is non-operative
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*/
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static int hda_wait_for_valid(u32 base)
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{
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u32 reg32;
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/* Send the verb to the codec */
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reg32 = read32(base + HDA_ICII_REG);
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reg32 |= HDA_ICII_BUSY | HDA_ICII_VALID;
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write32(base + HDA_ICII_REG, reg32);
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/* Use a 50 usec timeout - the Linux kernel uses the
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* same duration */
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int timeout = 50;
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while(timeout--) {
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reg32 = read32(base + HDA_ICII_REG);
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if ((reg32 & (HDA_ICII_VALID | HDA_ICII_BUSY)) ==
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HDA_ICII_VALID)
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return 0;
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udelay(1);
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}
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return -1;
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}
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/**
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* Find a specific entry within a verb table
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*
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* @verb_table_bytes: verb table size in bytes
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* @verb_table_data: verb table data
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* @viddid: vendor/device to search for
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* @verb_out: pointer to entry within table
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*
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* Returns size of the entry within the verb table,
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* Returns 0 if the entry is not found
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*
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* The HDA verb table is composed of dwords. A set of 4 dwords is
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* grouped together to form a "jack" descriptor.
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* Bits 31:28 - Codec Address
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* Bits 27:20 - NID
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* Bits 19:8 - Verb ID
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* Bits 7:0 - Payload
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*
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* coreboot groups different codec verb tables into a single table
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* and prefixes each with a specific header consisting of 3
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* dword entries:
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* 1 - Codec Vendor/Device ID
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* 2 - Subsystem ID
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* 3 - Number of jacks (groups of 4 dwords) for this codec
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*/
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static u32 hda_find_verb(u32 verb_table_bytes,
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const u32 *verb_table_data,
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u32 viddid, const u32 ** verb)
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{
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int idx=0;
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while (idx < (verb_table_bytes / sizeof(u32))) {
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u32 verb_size = 4 * verb_table_data[idx+2]; // in u32
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if (verb_table_data[idx] != viddid) {
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idx += verb_size + 3; // skip verb + header
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continue;
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}
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*verb = &verb_table_data[idx+3];
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return verb_size;
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}
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/* Not all codecs need to load another verb */
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return 0;
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}
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/**
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* Write a supplied verb table
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*/
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int hda_codec_write(u32 base, u32 size, const u32 *data)
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{
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int i;
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for (i = 0; i < size; i++) {
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if (hda_wait_for_ready(base) < 0)
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return -1;
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write32(base + HDA_IC_REG, data[i]);
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if (hda_wait_for_valid(base) < 0)
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return -1;
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}
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return 0;
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}
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/**
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* Initialize codec, then find the verb table and write it
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*/
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int hda_codec_init(u32 base, int addr, int verb_size, const u32 *verb_data)
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{
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const u32 *verb;
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u32 reg32, size;
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int rc;
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printk(BIOS_DEBUG, "HDA: Initializing codec #%d\n", addr);
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if (!verb_size || !verb_data) {
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printk(BIOS_DEBUG, "HDA: No verb list!\n");
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return -1;
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}
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/* 1 */
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if (hda_wait_for_ready(base) < 0) {
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printk(BIOS_DEBUG, " codec not ready.\n");
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return -1;
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}
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reg32 = (addr << 28) | 0x000f0000;
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write32(base + HDA_IC_REG, reg32);
|
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if (hda_wait_for_valid(base) < 0) {
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printk(BIOS_DEBUG, " codec not valid.\n");
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return -1;
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}
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/* 2 */
|
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reg32 = read32(base + HDA_IR_REG);
|
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printk(BIOS_DEBUG, "HDA: codec viddid: %08x\n", reg32);
|
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size = hda_find_verb(verb_size, verb_data, reg32, &verb);
|
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if (!size) {
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printk(BIOS_DEBUG, "HDA: No verb table entry found\n");
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return -1;
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}
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/* 3 */
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rc = hda_codec_write(base, size, verb);
|
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if (rc < 0)
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printk(BIOS_DEBUG, "HDA: verb not loaded\n");
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else
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printk(BIOS_DEBUG, "HDA: verb loaded.\n");
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return rc;
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}
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Loading…
Reference in a new issue