diff --git a/src/mainboard/starlabs/byte_adl/variants/mk_ii/devtree.c b/src/mainboard/starlabs/byte_adl/variants/mk_ii/devtree.c
index d762e75457..55ae2b39ac 100644
--- a/src/mainboard/starlabs/byte_adl/variants/mk_ii/devtree.c
+++ b/src/mainboard/starlabs/byte_adl/variants/mk_ii/devtree.c
@@ -13,9 +13,6 @@ void devtree_update(void)
 {
 	config_t *cfg = config_of_soc();
 
-	struct soc_intel_common_config *common_config;
-	common_config = chip_get_common_soc_structure();
-
 	struct soc_power_limits_config *soc_conf_4core =
 		&cfg->power_limits_config[ADL_N_041_6W_CORE];
 
@@ -34,15 +31,15 @@ void devtree_update(void)
 	switch (get_power_profile(PP_POWER_SAVER)) {
 	case PP_POWER_SAVER:
 		performance_scale			-= 50;
-		common_config->pch_thermal_trip		= 30;
+		cfg->tcc_offset				= 30;
 		break;
 	case PP_BALANCED:
 		performance_scale			-= 25;
-		common_config->pch_thermal_trip		= 25;
+		cfg->tcc_offset				= 25;
 		break;
 	case PP_PERFORMANCE:
 		/* Use the Intel defaults */
-		common_config->pch_thermal_trip		= 20;
+		cfg->tcc_offset				= 20;
 		break;
 	}
 
diff --git a/src/mainboard/starlabs/starbook/variants/adl/devtree.c b/src/mainboard/starlabs/starbook/variants/adl/devtree.c
index c563d2d1f7..0f40aaf1b1 100644
--- a/src/mainboard/starlabs/starbook/variants/adl/devtree.c
+++ b/src/mainboard/starlabs/starbook/variants/adl/devtree.c
@@ -13,9 +13,6 @@ void devtree_update(void)
 {
 	config_t *cfg = config_of_soc();
 
-	struct soc_intel_common_config *common_config;
-	common_config = chip_get_common_soc_structure();
-
 	struct soc_power_limits_config *soc_conf_10core =
 		&cfg->power_limits_config[ADL_P_282_442_482_28W_CORE];
 
@@ -38,15 +35,15 @@ void devtree_update(void)
 	switch (get_power_profile(PP_POWER_SAVER)) {
 	case PP_POWER_SAVER:
 		performance_scale			-= 50;
-		common_config->pch_thermal_trip		= 20;
+		cfg->tcc_offset				= 20;
 		break;
 	case PP_BALANCED:
 		performance_scale			-= 25;
-		common_config->pch_thermal_trip		= 15;
+		cfg->tcc_offset				= 15;
 		break;
 	case PP_PERFORMANCE:
 		/* Use the Intel defaults */
-		common_config->pch_thermal_trip		= 10;
+		cfg->tcc_offset				= 10;
 		break;
 	}
 
diff --git a/src/mainboard/starlabs/starbook/variants/adl_n/devtree.c b/src/mainboard/starlabs/starbook/variants/adl_n/devtree.c
index fe8716e226..a4cc362853 100644
--- a/src/mainboard/starlabs/starbook/variants/adl_n/devtree.c
+++ b/src/mainboard/starlabs/starbook/variants/adl_n/devtree.c
@@ -13,9 +13,6 @@ void devtree_update(void)
 {
 	config_t *cfg = config_of_soc();
 
-	struct soc_intel_common_config *common_config;
-	common_config = chip_get_common_soc_structure();
-
 	struct soc_power_limits_config *soc_conf_4core =
 		&cfg->power_limits_config[ADL_N_041_6W_CORE];
 
@@ -33,15 +30,15 @@ void devtree_update(void)
 	switch (get_power_profile(PP_POWER_SAVER)) {
 	case PP_POWER_SAVER:
 		performance_scale			-= 50;
-		common_config->pch_thermal_trip		= 20;
+		cfg->tcc_offset				= 20;
 		break;
 	case PP_BALANCED:
 		performance_scale			-= 25;
-		common_config->pch_thermal_trip		= 15;
+		cfg->tcc_offset				= 15;
 		break;
 	case PP_PERFORMANCE:
 		/* Use the Intel defaults */
-		common_config->pch_thermal_trip		= 10;
+		cfg->tcc_offset				= 10;
 		break;
 	}
 
diff --git a/src/mainboard/starlabs/starbook/variants/mtl/devtree.c b/src/mainboard/starlabs/starbook/variants/mtl/devtree.c
index a8944797df..1d0176d514 100644
--- a/src/mainboard/starlabs/starbook/variants/mtl/devtree.c
+++ b/src/mainboard/starlabs/starbook/variants/mtl/devtree.c
@@ -13,9 +13,6 @@ void devtree_update(void)
 {
 	config_t *cfg = config_of_soc();
 
-	struct soc_intel_common_config *common_config;
-	common_config = chip_get_common_soc_structure();
-
 	struct soc_power_limits_config *soc_conf_20core =
 		&cfg->power_limits_config[MTL_P_682_482_CORE];
 
@@ -33,15 +30,15 @@ void devtree_update(void)
 	switch (get_power_profile(PP_POWER_SAVER)) {
 	case PP_POWER_SAVER:
 		performance_scale			-= 50;
-		common_config->pch_thermal_trip		= 30;
+		cfg->tcc_offset				= 30;
 		break;
 	case PP_BALANCED:
 		performance_scale			-= 25;
-		common_config->pch_thermal_trip		= 25;
+		cfg->tcc_offset				= 25;
 		break;
 	case PP_PERFORMANCE:
 		/* Use the Intel defaults */
-		common_config->pch_thermal_trip		= 20;
+		cfg->tcc_offset				= 20;
 		break;
 	}
 
diff --git a/src/mainboard/starlabs/starbook/variants/rpl/devtree.c b/src/mainboard/starlabs/starbook/variants/rpl/devtree.c
index a8ebcde87c..5c2fc238dd 100644
--- a/src/mainboard/starlabs/starbook/variants/rpl/devtree.c
+++ b/src/mainboard/starlabs/starbook/variants/rpl/devtree.c
@@ -13,9 +13,6 @@ void devtree_update(void)
 {
 	config_t *cfg = config_of_soc();
 
-	struct soc_intel_common_config *common_config;
-	common_config = chip_get_common_soc_structure();
-
 	struct soc_power_limits_config *soc_conf_6core =
 		&cfg->power_limits_config[RPL_P_282_242_142_15W_CORE];
 
@@ -40,15 +37,15 @@ void devtree_update(void)
 	switch (get_power_profile(PP_POWER_SAVER)) {
 	case PP_POWER_SAVER:
 		performance_scale			-= 50;
-		common_config->pch_thermal_trip		= 30;
+		cfg->tcc_offset				= 30;
 		break;
 	case PP_BALANCED:
 		performance_scale			-= 25;
-		common_config->pch_thermal_trip		= 25;
+		cfg->tcc_offset				= 25;
 		break;
 	case PP_PERFORMANCE:
 		/* Use the Intel defaults */
-		common_config->pch_thermal_trip		= 20;
+		cfg->tcc_offset				= 20;
 		break;
 	}
 
diff --git a/src/mainboard/starlabs/starfighter/variants/rpl/devtree.c b/src/mainboard/starlabs/starfighter/variants/rpl/devtree.c
index c9b576a385..2bea4e81b3 100644
--- a/src/mainboard/starlabs/starfighter/variants/rpl/devtree.c
+++ b/src/mainboard/starlabs/starfighter/variants/rpl/devtree.c
@@ -13,9 +13,6 @@ void devtree_update(void)
 {
 	config_t *cfg = config_of_soc();
 
-	struct soc_intel_common_config *common_config;
-	common_config = chip_get_common_soc_structure();
-
 	struct soc_power_limits_config *soc_conf_6core =
 		&cfg->power_limits_config[RPL_P_282_242_142_15W_CORE];
 
@@ -41,15 +38,15 @@ void devtree_update(void)
 	switch (get_power_profile(PP_POWER_SAVER)) {
 	case PP_POWER_SAVER:
 		performance_scale			-= 50;
-		common_config->pch_thermal_trip		= 30;
+		cfg->tcc_offset				= 30;
 		break;
 	case PP_BALANCED:
 		performance_scale			-= 25;
-		common_config->pch_thermal_trip		= 25;
+		cfg->tcc_offset				= 25;
 		break;
 	case PP_PERFORMANCE:
 		/* Use the Intel defaults */
-		common_config->pch_thermal_trip		= 20;
+		cfg->tcc_offset				= 20;
 		break;
 	}
 
diff --git a/src/mainboard/starlabs/starlite_adl/variants/mk_v/devtree.c b/src/mainboard/starlabs/starlite_adl/variants/mk_v/devtree.c
index c2a95f7ac7..6805e32d05 100644
--- a/src/mainboard/starlabs/starlite_adl/variants/mk_v/devtree.c
+++ b/src/mainboard/starlabs/starlite_adl/variants/mk_v/devtree.c
@@ -13,9 +13,6 @@ void devtree_update(void)
 {
 	config_t *cfg = config_of_soc();
 
-	struct soc_intel_common_config *common_config;
-	common_config = chip_get_common_soc_structure();
-
 	struct soc_power_limits_config *soc_conf_4core =
 		&cfg->power_limits_config[ADL_N_041_6W_CORE];
 
@@ -36,15 +33,15 @@ void devtree_update(void)
 	switch (get_power_profile(PP_POWER_SAVER)) {
 	case PP_POWER_SAVER:
 		performance_scale			-= 50;
-		common_config->pch_thermal_trip		= 30;
+		cfg->tcc_offset				= 30;
 		break;
 	case PP_BALANCED:
 		performance_scale			-= 25;
-		common_config->pch_thermal_trip		= 25;
+		cfg->tcc_offset				= 25;
 		break;
 	case PP_PERFORMANCE:
 		/* Use the Intel defaults */
-		common_config->pch_thermal_trip		= 20;
+		cfg->tcc_offset				= 20;
 		break;
 	}