libpayload: Support board veyron
Add support board veyron: 1)Support driver rktimer 2)Support driver rkserial 3)Support config.veyron BUG=chrome-os-partner:29778 TEST=emerge-veyron libpayload Change-Id: I2cccedf3b62883dd372842a7972e93f2ebbfb282 Signed-off-by: huang lin <hl@rock-chips.com> Reviewed-on: https://chromium-review.googlesource.com/206184 Reviewed-by: Julius Werner <jwerner@chromium.org> Tested-by: Julius Werner <jwerner@chromium.org> Commit-Queue: Julius Werner <jwerner@chromium.org>
This commit is contained in:
parent
b420451c71
commit
387450d7c3
27 changed files with 274 additions and 1 deletions
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@ -199,6 +199,11 @@ config TEGRA_SERIAL_CONSOLE
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depends on SERIAL_CONSOLE
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default n
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config RK_SERIAL_CONSOLE
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bool "Rockchip SOC serial port driver"
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depends on SERIAL_CONSOLE
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default n
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config IPQ806X_SERIAL_CONSOLE
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bool "IPQ806x SOC compatible serial port driver"
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depends on SERIAL_CONSOLE
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@ -382,6 +387,8 @@ config TIMER_TEGRA_1US
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config TIMER_IPQ806X
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bool "Timer for ipq806x platforms"
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config TIMER_RK
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bool "Timer for Rockchip"
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endchoice
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config TIMER_MCT_HZ
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@ -394,6 +401,11 @@ config TIMER_MCT_ADDRESS
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depends on TIMER_MCT
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default 0x101c0000
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config TIMER_RK_ADDRESS
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hex "Rockchip timer base address"
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depends on TIMER_RK
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default 0xff810020
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config TIMER_TEGRA_1US_ADDRESS
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hex "Tegra u1s timer base address"
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depends on TIMER_TEGRA_1US
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@ -49,6 +49,7 @@ CONFIG_LP_TIMER_NONE=y
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# CONFIG_LP_TIMER_MCT is not set
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# CONFIG_LP_TIMER_TEGRA_1US is not set
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# CONFIG_LP_TIMER_IPQ806X is not set
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# CONFIG_LP_TIMER_RK is not set
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CONFIG_LP_USB=y
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# CONFIG_LP_USB_OHCI is not set
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CONFIG_LP_USB_EHCI=y
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@ -40,6 +40,7 @@ CONFIG_LP_SERIAL_CONSOLE=y
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CONFIG_LP_8250_SERIAL_CONSOLE=y
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# CONFIG_LP_S5P_SERIAL_CONSOLE is not set
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# CONFIG_LP_TEGRA_SERIAL_CONSOLE is not set
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# CONFIG_LP_RK_SERIAL_CONSOLE is not set
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# CONFIG_LP_IPQ806X_SERIAL_CONSOLE is not set
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# CONFIG_LP_PL011_SERIAL_CONSOLE is not set
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CONFIG_LP_SERIAL_IOBASE=0x3f8
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@ -40,6 +40,7 @@ CONFIG_LP_SERIAL_CONSOLE=y
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CONFIG_LP_8250_SERIAL_CONSOLE=y
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# CONFIG_LP_S5P_SERIAL_CONSOLE is not set
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# CONFIG_LP_TEGRA_SERIAL_CONSOLE is not set
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# CONFIG_LP_RK_SERIAL_CONSOLE is not set
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# CONFIG_LP_IPQ806X_SERIAL_CONSOLE is not set
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# CONFIG_LP_PL011_SERIAL_CONSOLE is not set
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CONFIG_LP_SERIAL_IOBASE=0x3f8
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@ -40,6 +40,7 @@ CONFIG_LP_SERIAL_CONSOLE=y
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CONFIG_LP_8250_SERIAL_CONSOLE=y
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# CONFIG_LP_S5P_SERIAL_CONSOLE is not set
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# CONFIG_LP_TEGRA_SERIAL_CONSOLE is not set
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# CONFIG_LP_RK_SERIAL_CONSOLE is not set
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# CONFIG_LP_IPQ806X_SERIAL_CONSOLE is not set
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# CONFIG_LP_PL011_SERIAL_CONSOLE is not set
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CONFIG_LP_SERIAL_IOBASE=0x3f8
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@ -39,6 +39,7 @@ CONFIG_LP_SERIAL_CONSOLE=y
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# CONFIG_LP_8250_SERIAL_CONSOLE is not set
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CONFIG_LP_S5P_SERIAL_CONSOLE=y
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# CONFIG_LP_TEGRA_SERIAL_CONSOLE is not set
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# CONFIG_LP_RK_SERIAL_CONSOLE is not set
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# CONFIG_LP_IPQ806X_SERIAL_CONSOLE is not set
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# CONFIG_LP_SERIAL_SET_SPEED is not set
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# CONFIG_LP_SERIAL_ACS_FALLBACK is not set
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@ -55,6 +56,7 @@ CONFIG_LP_COREBOOT_VIDEO_CONSOLE=y
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CONFIG_LP_TIMER_MCT=y
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# CONFIG_LP_TIMER_TEGRA_1US is not set
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# CONFIG_LP_TIMER_IPQ806X is not set
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# CONFIG_LP_TIMER_RK is not set
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CONFIG_LP_TIMER_MCT_HZ=24000000
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CONFIG_LP_TIMER_MCT_ADDRESS=0x101c0000
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CONFIG_LP_USB=y
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@ -40,6 +40,7 @@ CONFIG_LP_SERIAL_CONSOLE=y
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CONFIG_LP_8250_SERIAL_CONSOLE=y
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# CONFIG_LP_S5P_SERIAL_CONSOLE is not set
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# CONFIG_LP_TEGRA_SERIAL_CONSOLE is not set
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# CONFIG_LP_RK_SERIAL_CONSOLE is not set
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# CONFIG_LP_IPQ806X_SERIAL_CONSOLE is not set
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# CONFIG_LP_PL011_SERIAL_CONSOLE is not set
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CONFIG_LP_SERIAL_IOBASE=0x3f8
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@ -40,6 +40,7 @@ CONFIG_LP_SERIAL_CONSOLE=y
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CONFIG_LP_8250_SERIAL_CONSOLE=y
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# CONFIG_LP_S5P_SERIAL_CONSOLE is not set
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# CONFIG_LP_TEGRA_SERIAL_CONSOLE is not set
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# CONFIG_LP_RK_SERIAL_CONSOLE is not set
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# CONFIG_LP_IPQ806X_SERIAL_CONSOLE is not set
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# CONFIG_LP_PL011_SERIAL_CONSOLE is not set
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CONFIG_LP_SERIAL_IOBASE=0x3f8
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@ -40,6 +40,7 @@ CONFIG_LP_SERIAL_CONSOLE=y
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CONFIG_LP_8250_SERIAL_CONSOLE=y
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# CONFIG_LP_S5P_SERIAL_CONSOLE is not set
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# CONFIG_LP_TEGRA_SERIAL_CONSOLE is not set
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# CONFIG_LP_RK_SERIAL_CONSOLE is not set
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# CONFIG_LP_IPQ806X_SERIAL_CONSOLE is not set
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# CONFIG_LP_PL011_SERIAL_CONSOLE is not set
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CONFIG_LP_SERIAL_IOBASE=0x3f8
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@ -40,6 +40,7 @@ CONFIG_LP_SERIAL_CONSOLE=y
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CONFIG_LP_8250_SERIAL_CONSOLE=y
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# CONFIG_LP_S5P_SERIAL_CONSOLE is not set
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# CONFIG_LP_TEGRA_SERIAL_CONSOLE is not set
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# CONFIG_LP_RK_SERIAL_CONSOLE is not set
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# CONFIG_LP_IPQ806X_SERIAL_CONSOLE is not set
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# CONFIG_LP_PL011_SERIAL_CONSOLE is not set
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CONFIG_LP_SERIAL_IOBASE=0x3f8
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@ -40,6 +40,7 @@ CONFIG_LP_SERIAL_CONSOLE=y
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CONFIG_LP_8250_SERIAL_CONSOLE=y
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# CONFIG_LP_S5P_SERIAL_CONSOLE is not set
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# CONFIG_LP_TEGRA_SERIAL_CONSOLE is not set
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# CONFIG_LP_RK_SERIAL_CONSOLE is not set
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# CONFIG_LP_IPQ806X_SERIAL_CONSOLE is not set
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# CONFIG_LP_PL011_SERIAL_CONSOLE is not set
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CONFIG_LP_SERIAL_IOBASE=0x3f8
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@ -40,6 +40,7 @@ CONFIG_LP_SERIAL_CONSOLE=y
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CONFIG_LP_8250_SERIAL_CONSOLE=y
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# CONFIG_LP_S5P_SERIAL_CONSOLE is not set
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# CONFIG_LP_TEGRA_SERIAL_CONSOLE is not set
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# CONFIG_LP_RK_SERIAL_CONSOLE is not set
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# CONFIG_LP_IPQ806X_SERIAL_CONSOLE is not set
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# CONFIG_LP_PL011_SERIAL_CONSOLE is not set
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CONFIG_LP_SERIAL_IOBASE=0x3f8
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@ -39,6 +39,7 @@ CONFIG_LP_SERIAL_CONSOLE=y
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# CONFIG_LP_8250_SERIAL_CONSOLE is not set
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# CONFIG_LP_S5P_SERIAL_CONSOLE is not set
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CONFIG_LP_TEGRA_SERIAL_CONSOLE=y
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# CONFIG_LP_RK_SERIAL_CONSOLE is not set
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# CONFIG_LP_IPQ806X_SERIAL_CONSOLE is not set
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# CONFIG_LP_SERIAL_SET_SPEED is not set
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# CONFIG_LP_SERIAL_ACS_FALLBACK is not set
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@ -54,6 +55,7 @@ CONFIG_LP_COREBOOT_VIDEO_CONSOLE=y
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# CONFIG_LP_TIMER_NONE is not set
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# CONFIG_LP_TIMER_MCT is not set
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CONFIG_LP_TIMER_TEGRA_1US=y
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# CONFIG_LP_TIMER_RK is not set
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# CONFIG_LP_TIMER_IPQ806X is not set
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CONFIG_LP_TIMER_TEGRA_1US_ADDRESS=0x60005010
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CONFIG_LP_USB=y
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@ -39,6 +39,7 @@ CONFIG_LP_SERIAL_CONSOLE=y
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# CONFIG_LP_8250_SERIAL_CONSOLE is not set
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# CONFIG_LP_S5P_SERIAL_CONSOLE is not set
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CONFIG_LP_TEGRA_SERIAL_CONSOLE=y
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# CONFIG_LP_RK_SERIAL_CONSOLE is not set
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# CONFIG_LP_IPQ806X_SERIAL_CONSOLE is not set
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# CONFIG_LP_SERIAL_SET_SPEED is not set
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# CONFIG_LP_SERIAL_ACS_FALLBACK is not set
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@ -54,6 +55,7 @@ CONFIG_LP_COREBOOT_VIDEO_CONSOLE=y
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# CONFIG_LP_TIMER_NONE is not set
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# CONFIG_LP_TIMER_MCT is not set
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CONFIG_LP_TIMER_TEGRA_1US=y
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# CONFIG_LP_TIMER_RK is not set
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# CONFIG_LP_TIMER_IPQ806X is not set
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CONFIG_LP_TIMER_TEGRA_1US_ADDRESS=0x60005010
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CONFIG_LP_USB=y
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@ -39,6 +39,7 @@ CONFIG_LP_SERIAL_CONSOLE=y
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# CONFIG_LP_8250_SERIAL_CONSOLE is not set
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# CONFIG_LP_S5P_SERIAL_CONSOLE is not set
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CONFIG_LP_TEGRA_SERIAL_CONSOLE=y
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# CONFIG_LP_RK_SERIAL_CONSOLE is not set
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# CONFIG_LP_IPQ806X_SERIAL_CONSOLE is not set
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# CONFIG_LP_SERIAL_SET_SPEED is not set
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# CONFIG_LP_SERIAL_ACS_FALLBACK is not set
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@ -54,6 +55,7 @@ CONFIG_LP_COREBOOT_VIDEO_CONSOLE=y
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# CONFIG_LP_TIMER_NONE is not set
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# CONFIG_LP_TIMER_MCT is not set
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CONFIG_LP_TIMER_TEGRA_1US=y
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# CONFIG_LP_TIMER_RK is not set
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# CONFIG_LP_TIMER_IPQ806X is not set
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CONFIG_LP_TIMER_TEGRA_1US_ADDRESS=0x60005010
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CONFIG_LP_USB=y
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@ -40,6 +40,7 @@ CONFIG_LP_SERIAL_CONSOLE=y
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CONFIG_LP_8250_SERIAL_CONSOLE=y
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# CONFIG_LP_S5P_SERIAL_CONSOLE is not set
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# CONFIG_LP_TEGRA_SERIAL_CONSOLE is not set
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# CONFIG_LP_RK_SERIAL_CONSOLE is not set
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# CONFIG_LP_IPQ806X_SERIAL_CONSOLE is not set
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# CONFIG_LP_PL011_SERIAL_CONSOLE is not set
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CONFIG_LP_SERIAL_IOBASE=0x3f8
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@ -39,6 +39,7 @@ CONFIG_LP_SERIAL_CONSOLE=y
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# CONFIG_LP_8250_SERIAL_CONSOLE is not set
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CONFIG_LP_S5P_SERIAL_CONSOLE=y
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# CONFIG_LP_TEGRA_SERIAL_CONSOLE is not set
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# CONFIG_LP_RK_SERIAL_CONSOLE is not set
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# CONFIG_LP_IPQ806X_SERIAL_CONSOLE is not set
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# CONFIG_LP_SERIAL_SET_SPEED is not set
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# CONFIG_LP_SERIAL_ACS_FALLBACK is not set
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@ -54,6 +55,7 @@ CONFIG_LP_COREBOOT_VIDEO_CONSOLE=y
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# CONFIG_LP_TIMER_NONE is not set
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CONFIG_LP_TIMER_MCT=y
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# CONFIG_LP_TIMER_TEGRA_1US is not set
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# CONFIG_LP_TIMER_RK is not set
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# CONFIG_LP_TIMER_IPQ806X is not set
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CONFIG_LP_TIMER_MCT_HZ=24000000
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CONFIG_LP_TIMER_MCT_ADDRESS=0x101c0000
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@ -40,6 +40,7 @@ CONFIG_LP_SERIAL_CONSOLE=y
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CONFIG_LP_8250_SERIAL_CONSOLE=y
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# CONFIG_LP_S5P_SERIAL_CONSOLE is not set
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# CONFIG_LP_TEGRA_SERIAL_CONSOLE is not set
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# CONFIG_LP_RK_SERIAL_CONSOLE is not set
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# CONFIG_LP_IPQ806X_SERIAL_CONSOLE is not set
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# CONFIG_LP_PL011_SERIAL_CONSOLE is not set
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CONFIG_LP_SERIAL_IOBASE=0x3f8
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@ -40,6 +40,7 @@ CONFIG_LP_SERIAL_CONSOLE=y
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CONFIG_LP_8250_SERIAL_CONSOLE=y
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# CONFIG_LP_S5P_SERIAL_CONSOLE is not set
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# CONFIG_LP_TEGRA_SERIAL_CONSOLE is not set
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# CONFIG_LP_RK_SERIAL_CONSOLE is not set
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# CONFIG_LP_IPQ806X_SERIAL_CONSOLE is not set
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# CONFIG_LP_PL011_SERIAL_CONSOLE is not set
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CONFIG_LP_SERIAL_IOBASE=0x3f8
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@ -54,6 +54,7 @@ CONFIG_LP_COREBOOT_VIDEO_CONSOLE=y
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# CONFIG_LP_TIMER_NONE is not set
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# CONFIG_LP_TIMER_MCT is not set
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CONFIG_LP_TIMER_TEGRA_1US=y
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# CONFIG_LP_TIMER_RK is not set
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# CONFIG_LP_TIMER_IPQ806X is not set
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CONFIG_LP_TIMER_TEGRA_1US_ADDRESS=0x60005010
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CONFIG_LP_USB=y
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@ -40,6 +40,7 @@ CONFIG_LP_SERIAL_CONSOLE=y
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CONFIG_LP_8250_SERIAL_CONSOLE=y
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# CONFIG_LP_S5P_SERIAL_CONSOLE is not set
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# CONFIG_LP_TEGRA_SERIAL_CONSOLE is not set
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# CONFIG_LP_RK_SERIAL_CONSOLE is not set
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# CONFIG_LP_IPQ806X_SERIAL_CONSOLE is not set
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# CONFIG_LP_PL011_SERIAL_CONSOLE is not set
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CONFIG_LP_SERIAL_IOBASE=0x3f8
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@ -40,6 +40,7 @@ CONFIG_LP_SERIAL_CONSOLE=y
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CONFIG_LP_8250_SERIAL_CONSOLE=y
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# CONFIG_LP_S5P_SERIAL_CONSOLE is not set
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# CONFIG_LP_TEGRA_SERIAL_CONSOLE is not set
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# CONFIG_LP_RK_SERIAL_CONSOLE is not set
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# CONFIG_LP_IPQ806X_SERIAL_CONSOLE is not set
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# CONFIG_LP_PL011_SERIAL_CONSOLE is not set
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CONFIG_LP_SERIAL_IOBASE=0x3f8
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@ -39,6 +39,7 @@ CONFIG_LP_SERIAL_CONSOLE=y
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# CONFIG_LP_8250_SERIAL_CONSOLE is not set
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# CONFIG_LP_S5P_SERIAL_CONSOLE is not set
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# CONFIG_LP_TEGRA_SERIAL_CONSOLE is not set
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# CONFIG_LP_RK_SERIAL_CONSOLE is not set
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CONFIG_LP_IPQ806X_SERIAL_CONSOLE=y
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# CONFIG_LP_SERIAL_SET_SPEED is not set
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# CONFIG_LP_SERIAL_ACS_FALLBACK is not set
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@ -53,6 +54,7 @@ CONFIG_LP_IPQ806X_SERIAL_CONSOLE=y
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# CONFIG_LP_TIMER_NONE is not set
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# CONFIG_LP_TIMER_MCT is not set
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# CONFIG_LP_TIMER_TEGRA_1US is not set
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# CONFIG_LP_TIMER_RK is not set
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CONFIG_LP_TIMER_IPQ806X=y
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CONFIG_LP_IPQ806X_TIMER_FREQ=32000
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CONFIG_LP_IPQ806X_TIMER_REG=0x0200A008
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73
payloads/libpayload/configs/config.veyron
Normal file
73
payloads/libpayload/configs/config.veyron
Normal file
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@ -0,0 +1,73 @@
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#
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# Automatically generated make config: don't edit
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# libpayload version: 0.2.0
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# Fri May 3 13:22:35 2013
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#
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#
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# Generic Options
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#
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CONFIG_LP_GPL=y
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# CONFIG_LP_EXPERIMENTAL is not set
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# CONFIG_LP_OBSOLETE is not set
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# CONFIG_LP_DEVELOPER is not set
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CONFIG_LP_CHROMEOS=y
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#
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# Architecture Options
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#
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CONFIG_LP_ARCH_ARM=y
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# CONFIG_LP_ARCH_ARM64 is not set
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# CONFIG_LP_ARCH_POWERPC is not set
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# CONFIG_LP_ARCH_X86 is not set
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# CONFIG_LP_MEMMAP_RAM_ONLY is not set
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#
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# Standard Libraries
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#
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CONFIG_LP_LIBC=y
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# CONFIG_LP_CURSES is not set
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CONFIG_LP_CBFS=y
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CONFIG_LP_LZMA=y
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#
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# Console Options
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#
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CONFIG_LP_SKIP_CONSOLE_INIT=y
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CONFIG_LP_CBMEM_CONSOLE=y
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CONFIG_LP_SERIAL_CONSOLE=y
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# CONFIG_LP_8250_SERIAL_CONSOLE is not set
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CONFIG_LP_RK_SERIAL_CONSOLE=y
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#CONFIG_LP_S5P_SERIAL_CONSOLE is not set
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# CONFIG_LP_TEGRA_SERIAL_CONSOLE is not set
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# CONFIG_LP_IPQ806X_SERIAL_CONSOLE is not set
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# CONFIG_LP_SERIAL_SET_SPEED is not set
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# CONFIG_LP_SERIAL_ACS_FALLBACK is not set
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CONFIG_LP_VIDEO_CONSOLE=y
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CONFIG_LP_COREBOOT_VIDEO_CONSOLE=y
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# CONFIG_LP_PC_KEYBOARD is not set
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#
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# Drivers
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#
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# CONFIG_LP_RTC_PORT_EXTENDED_VIA is not set
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# CONFIG_LP_STORAGE is not set
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CONFIG_LP_TIMER_RK=y
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CONFIG_LP_TIMER_RK_ADDRESS=0xff810020
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# CONFIG_LP_TIMER_MCT is not set
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# CONFIG_LP_TIMER_TEGRA_1US is not set
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# CONFIG_LP_TIMER_IPQ806X is not set
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# CONFIG_LP_TIMER_MCT_HZ is not set
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CONFIG_LP_USB=y
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# CONFIG_LP_USB_OHCI is not set
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CONFIG_LP_USB_EHCI=y
|
||||
# CONFIG_LP_USB_XHCI is not set
|
||||
CONFIG_LP_USB_HID=y
|
||||
CONFIG_LP_USB_HUB=y
|
||||
CONFIG_LP_USB_MSC=y
|
||||
# CONFIG_LP_USB_PCI is not set
|
||||
CONFIG_LP_USB_GEN_HUB=y
|
||||
# CONFIG_LP_BIG_ENDIAN is not set
|
||||
CONFIG_LP_LITTLE_ENDIAN=y
|
||||
# CONFIG_LP_IO_ADDRESS_SPACE is not set
|
||||
CONFIG_LP_ARCH_SPECIFIC_OPTIONS=y
|
||||
|
|
@ -37,7 +37,7 @@ libc-$(CONFIG_LP_8250_SERIAL_CONSOLE) += serial/8250.c
|
|||
libc-$(CONFIG_LP_S5P_SERIAL_CONSOLE) += serial/s5p.c
|
||||
libc-$(CONFIG_LP_TEGRA_SERIAL_CONSOLE) += serial/tegra.c
|
||||
libc-$(CONFIG_LP_IPQ806X_SERIAL_CONSOLE) += serial/ipq806x.c
|
||||
|
||||
libc-$(CONFIG_LP_RK_SERIAL_CONSOLE) += serial/rk_serial.c
|
||||
libc-$(CONFIG_LP_PC_KEYBOARD) += keyboard.c
|
||||
|
||||
libc-$(CONFIG_LP_CBMEM_CONSOLE) += cbmem_console.c
|
||||
|
|
@ -50,6 +50,7 @@ libc-$(CONFIG_LP_TIMER_MCT) += timer/mct.c
|
|||
libc-$(CONFIG_LP_TIMER_RDTSC) += timer/rdtsc.c
|
||||
libc-$(CONFIG_LP_TIMER_TEGRA_1US) += timer/tegra_1us.c
|
||||
libc-$(CONFIG_LP_TIMER_IPQ806X) += timer/ipq806x.c
|
||||
libc-$(CONFIG_LP_TIMER_RK) += timer/rktimer.c
|
||||
|
||||
# Video console drivers
|
||||
libc-$(CONFIG_LP_VIDEO_CONSOLE) += video/video.c
|
||||
|
|
|
|||
115
payloads/libpayload/drivers/serial/rk_serial.c
Normal file
115
payloads/libpayload/drivers/serial/rk_serial.c
Normal file
|
|
@ -0,0 +1,115 @@
|
|||
/*
|
||||
* This file is part of the coreboot project.
|
||||
*
|
||||
* Copyright (C) 2014 Rockchip Electronics
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; version 2 of the License.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
||||
*/
|
||||
#include <libpayload-config.h>
|
||||
#include <libpayload.h>
|
||||
struct rk_uart {
|
||||
union {
|
||||
u32 uart_thr; /*Transmit holding register.*/
|
||||
u32 uart_rbr; /*Receive buffer register.*/
|
||||
u32 uart_dll; /* Divisor latch lsb.*/
|
||||
};
|
||||
union {
|
||||
u32 uart_ier; /*Interrupt enable register.*/
|
||||
u32 uart_dlh; /* Divisor latch msb.*/
|
||||
};
|
||||
union {
|
||||
uint32_t uart_iir; /*Interrupt identification register.*/
|
||||
uint32_t uart_fcr; /* FIFO control register.*/
|
||||
};
|
||||
u32 uart_lcr;
|
||||
u32 uart_mcr;
|
||||
u32 uart_lsr;
|
||||
u32 uart_msr;
|
||||
u32 uart_scr;
|
||||
u32 reserved1[(0x30 - 0x20) / 4];
|
||||
u32 uart_srbr[(0x70 - 0x30) / 4];
|
||||
u32 uart_far;
|
||||
u32 uart_tfr;
|
||||
u32 uart_rfw;
|
||||
u32 uart_usr;
|
||||
u32 uart_tfl;
|
||||
u32 uart_rfl;
|
||||
u32 uart_srr;
|
||||
u32 uart_srts;
|
||||
u32 uart_sbcr;
|
||||
u32 uart_sdmam;
|
||||
u32 uart_sfe;
|
||||
u32 uart_srt;
|
||||
u32 uart_stet;
|
||||
u32 uart_htx;
|
||||
u32 uart_dmasa;
|
||||
u32 reserver2[(0xf4 - 0xac) / 4];
|
||||
u32 uart_cpr;
|
||||
u32 uart_ucv;
|
||||
u32 uart_ctr;
|
||||
};
|
||||
enum {
|
||||
UART_LSR_DR = 0x1 << 0, /*Data ready.*/
|
||||
UART_LSR_OE = 0x1 << 1, /*Overrun.*/
|
||||
UART_LSR_PE = 0x1 << 2, /*Parity error.*/
|
||||
UART_LSR_FE = 0x1 << 3, /*Framing error.*/
|
||||
UART_LSR_BI = 0x1 << 4, /*Break.*/
|
||||
UART_LSR_THRE = 0x1 << 5, /*Xmit holding register empty.*/
|
||||
UART_LSR_TEMT = 0x1 << 6, /*Xmitter empty.*/
|
||||
UART_LSR_ERR = 0x1 << 7 /* Error.*/
|
||||
};
|
||||
|
||||
static struct rk_uart *uart_regs;
|
||||
void serial_putchar(unsigned int c)
|
||||
{
|
||||
while (!(readl(&uart_regs->uart_lsr) & UART_LSR_THRE));
|
||||
writel((c&0xff), &uart_regs->uart_thr);
|
||||
if (c == '\n')
|
||||
serial_putchar('\r');
|
||||
}
|
||||
|
||||
int serial_havechar(void)
|
||||
{
|
||||
uint8_t lsr = readl(&uart_regs->uart_lsr);
|
||||
return (lsr & UART_LSR_DR) == UART_LSR_DR;
|
||||
}
|
||||
|
||||
int serial_getchar(void)
|
||||
{
|
||||
while (!serial_havechar());
|
||||
return readl(&uart_regs->uart_rbr)&0xff;
|
||||
}
|
||||
|
||||
static struct console_input_driver consin = {
|
||||
.havekey = &serial_havechar,
|
||||
.getchar = &serial_getchar
|
||||
};
|
||||
|
||||
static struct console_output_driver consout = {.putchar = &serial_putchar
|
||||
};
|
||||
|
||||
void serial_init(void)
|
||||
{
|
||||
if (!lib_sysinfo.serial || !lib_sysinfo.serial->baseaddr)
|
||||
return;
|
||||
|
||||
uart_regs = (struct rk_uart *)lib_sysinfo.serial->baseaddr;
|
||||
}
|
||||
|
||||
void serial_console_init(void)
|
||||
{
|
||||
serial_init();
|
||||
console_add_input_driver(&consin);
|
||||
console_add_output_driver(&consout);
|
||||
}
|
||||
44
payloads/libpayload/drivers/timer/rktimer.c
Normal file
44
payloads/libpayload/drivers/timer/rktimer.c
Normal file
|
|
@ -0,0 +1,44 @@
|
|||
|
||||
/*
|
||||
* This file is part of the coreboot project.
|
||||
*
|
||||
* Copyright (C) 2014 Rockchip Electronics
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; version 2 of the License.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
||||
*/
|
||||
#include <arch/io.h>
|
||||
#include <libpayload.h>
|
||||
#include <stdint.h>
|
||||
struct rk_timer {
|
||||
u32 timer_load_count0;
|
||||
u32 timer_load_count1;
|
||||
u32 timer_curr_value0;
|
||||
u32 timer_curr_value1;
|
||||
u32 timer_ctrl_reg;
|
||||
u32 timer_int_status;
|
||||
};
|
||||
uint64_t timer_hz(void)
|
||||
{
|
||||
return 24000000;
|
||||
}
|
||||
uint64_t timer_raw_value(void)
|
||||
{
|
||||
uint64_t upper;
|
||||
uint64_t lower;
|
||||
struct rk_timer *rk_timer;
|
||||
rk_timer = (struct rk_timer *)CONFIG_LP_TIMER_RK_ADDRESS;
|
||||
lower = (uint64_t) rk_timer->timer_curr_value0;
|
||||
upper = (uint64_t) rk_timer->timer_curr_value1;
|
||||
return (upper << 32) | lower;
|
||||
}
|
||||
Loading…
Add table
Add a link
Reference in a new issue