diff --git a/src/soc/amd/cezanne/Kconfig b/src/soc/amd/cezanne/Kconfig
index eeb4266c84..d02339e400 100644
--- a/src/soc/amd/cezanne/Kconfig
+++ b/src/soc/amd/cezanne/Kconfig
@@ -100,6 +100,7 @@ config SOC_AMD_CEZANNE
 config SOC_AMD_RENOIR
 	bool
 	select SOC_AMD_CEZANNE_BASE
+	select SOC_AMD_SUPPORTS_WARM_RESET
 	select SOC_AMD_COMMON_BLOCK_CPU_SYNC_PSP_ADDR_MSR
 	help
 		AMD Renoir support
diff --git a/src/soc/amd/cezanne/fch.c b/src/soc/amd/cezanne/fch.c
index 52bdbb03f1..1fabe3a864 100644
--- a/src/soc/amd/cezanne/fch.c
+++ b/src/soc/amd/cezanne/fch.c
@@ -173,7 +173,9 @@ static void cgpll_clock_gate_init(void)
 
 void fch_init(void *chip_info)
 {
-	set_resets_to_cold();
+	if (!CONFIG(SOC_AMD_RENOIR))
+		set_resets_to_cold();
+
 	i2c_soc_init();
 	fch_init_acpi_ports();