From 38386715c52526edbe9ad356945849e21799fd94 Mon Sep 17 00:00:00 2001 From: Ionela Voinescu Date: Tue, 11 Nov 2014 13:39:18 +0000 Subject: [PATCH] urara: add config of SPI bus and correct selection of winbond flash Urara uses SPFI interface 1 and Winbond SPI NOR flash. BRANCH=none BUG=chrome-os-partner:31438 TEST=with the fix of the Winbond driver (next patch) the bootblock successfully probes the Windbond device on the FPGA board. Console log below: coreboot-4.0 bootblock Tue Nov 11 07:05:48 PST 2014 starting... SF: Detected W25Q16 with page size 1000, total 200000 Change-Id: Ic27b60adc26bf244e7a15b5257e94df4b9d88249 Signed-off-by: Ionela Voinescu Reviewed-on: https://chromium-review.googlesource.com/229030 Reviewed-by: Vadim Bendebury --- src/mainboard/google/urara/Kconfig | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/src/mainboard/google/urara/Kconfig b/src/mainboard/google/urara/Kconfig index 0020ebbea1..16a09fe34c 100644 --- a/src/mainboard/google/urara/Kconfig +++ b/src/mainboard/google/urara/Kconfig @@ -25,7 +25,7 @@ config BOARD_SPECIFIC_OPTIONS def_bool y select BOOTBLOCK_CONSOLE select CHROMEOS - select CONFIG_SPI_FLASH_WINBOND + select SPI_FLASH_WINBOND select CPU_IMGTEC_PISTACHIO select COMMON_CBFS_SPI_WRAPPER select MAINBOARD_HAS_BOOTBLOCK_INIT @@ -47,4 +47,8 @@ config TTYS0_LCS int default 3 +config BOOT_MEDIA_SPI_BUS + int "SPI bus for boot media" + default 1 + endif