soc/mediatek: Rename FREQ_*MHZ to PMIF_TARGET_FREQ_MHZ

Enum is useful for improving readability because of the meaningful enum
names. Names such as "FREQ_260MHZ = 260", however, don't provide any
extra information of the value itself. Therefore, rename those enums to
PMIF_TARGET_FREQ_MHZ to better reflect its usage.

Change-Id: I420b909a76973a040b96feb2bcb93d3640b086b5
Signed-off-by: Yu-Ping Wu <yupingso@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/85204
Reviewed-by: Yidi Lin <yidilin@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/soc/mediatek/mt8186/include/soc/pmif.h

@@ -133,7 +133,7 @@ check_member(mtk_pmif_regs, swinf_0_acc, 0x800);
 #define PMIF_SPI_AP_CHAN	(PMIF_SPI_BASE + 0xC20)
 
 enum {
-	FREQ_250MHZ = 250,
+	PMIF_TARGET_FREQ_MHZ = 250,
 };
 
 /* calibation tolerance rate, unit: 0.1% */

src/soc/mediatek/mt8186/pmif_clk.c

@@ -42,7 +42,7 @@ int pmif_clk_init(void)
 
 	/* get hardware default value */
 	ulposc = pmif_get_ulposc_freq_mhz(ULPOSC1_RG_OSC_DIV);
-	if (pmif_ulposc_check(ulposc, FREQ_250MHZ))
+	if (pmif_ulposc_check(ulposc, PMIF_TARGET_FREQ_MHZ))
 		die("ERROR: failed to meet ulposc frequency\n");
 
 	mt_pll_spmi_mux_select();

src/soc/mediatek/mt8188/include/soc/pmif.h

@@ -134,7 +134,7 @@ struct mtk_clk_monitor_regs {
 #define mtk_clk_monitor		((struct mtk_clk_monitor_regs *)EFUSE_BASE + 0x45C)
 
 enum {
-	FREQ_260MHZ = 260,
+	PMIF_TARGET_FREQ_MHZ = 260,
 };
 
 /* calibation tolerance rate, unit: 0.1% */

src/soc/mediatek/mt8188/pmif_clk.c

@@ -116,7 +116,7 @@ static int pmif_init_ulposc(void)
 	SET32_BITFIELDS(&mtk_spm->ulposc_con, ULPOSC_CG_EN, 1);
 	udelay(50);
 
-	return pmif_ulposc_cali(FREQ_260MHZ);
+	return pmif_ulposc_cali(PMIF_TARGET_FREQ_MHZ);
 }
 
 int pmif_clk_init(void)

src/soc/mediatek/mt8192/include/soc/pmif.h

@@ -127,7 +127,7 @@ check_member(mtk_pmif_regs, swinf_0_acc, 0xC00);
 #define PMIF_SPI_AP_CHAN	(PMIF_SPI_BASE + 0xC80)
 
 enum {
-	FREQ_260MHZ = 260,
+	PMIF_TARGET_FREQ_MHZ = 260,
 };
 
 /* calibation tolerance rate, unit: 0.1% */

src/soc/mediatek/mt8192/pmif_clk.c

@@ -99,7 +99,7 @@ static int pmif_init_ulposc(void)
 	udelay(100);
 	SET32_BITFIELDS(&mtk_spm->ulposc_con, ULPOSC_CG_EN, 1);
 
-	return pmif_ulposc_cali(FREQ_260MHZ);
+	return pmif_ulposc_cali(PMIF_TARGET_FREQ_MHZ);
 }
 
 int pmif_clk_init(void)

src/soc/mediatek/mt8195/include/soc/pmif.h

@@ -137,7 +137,7 @@ check_member(mtk_scp_regs, scp_clk_on_ctrl, 0x6C);
 #define mtk_scp		((struct mtk_scp_regs *)SCP_CFG_BASE + 0x21000)
 
 enum {
-	FREQ_248MHZ = 248,
+	PMIF_TARGET_FREQ_MHZ = 248,
 };
 
 /* calibation tolerance rate, unit: 0.1% */

src/soc/mediatek/mt8195/pmif_clk.c

@@ -98,7 +98,7 @@ static int pmif_init_ulposc(void)
 	SET32_BITFIELDS(&mtk_scp->scp_clk_on_ctrl, SCP_CLK_ON_CTRL, 1);
 	SET32_BITFIELDS(&mtk_spm->ulposc_con, ULPOSC_CG_EN, 1);
 
-	return pmif_ulposc_cali(FREQ_248MHZ);
+	return pmif_ulposc_cali(PMIF_TARGET_FREQ_MHZ);
 }
 
 int pmif_clk_init(void)