Revert "soc/amd/glinda/Kconfig: Increase APOB NV size"

This reverts commit 362232d236.

Reason for revert:
This introduced an overlap between APOB DRAM region and SHAREDMEM
region used for PSP verstage. Our linker scripts would have caught that,
but we don't have any glinda based mainboards using VBOOT in the tree
at the moment so there is no actual overlap on any upstream mainboards
at the moment. Still if VBOOT based mainboards are added in the future
it would cause a build error for them.

The next patch in the train will increase the APOB NV size properly by
increasing all the other addresses in the chain too.

Signed-off-by: Maximilian Brune <maximilian.brune@9elements.com>
Change-Id: I4b4cb4104a59f72491a941dc1d13018f2389bb03
Reviewed-on: https://review.coreboot.org/c/coreboot/+/86861
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/mainboard/amd/birman/board_glinda.fmd

@@ -4,6 +4,6 @@ FLASH@0xFF000000 16M {
 		FMAP 4K
 		COREBOOT(CBFS)
 		EC_BODY@15872K 256K
-		RW_MRC_CACHE 256K
+		RW_MRC_CACHE 120K
 	}
 }

src/mainboard/amd/birman/chromeos_glinda.fmd

@@ -30,6 +30,6 @@ FLASH@0xFF000000 16M {
 		SMMSTORE(PRESERVE) 256K
 		RW_LEGACY(CBFS)
 		EC_BODY@15872K 256K
-		RW_MRC_CACHE(PRESERVE) 256K
+		RW_MRC_CACHE(PRESERVE) 120K
 	}
 }

src/mainboard/amd/birman_plus/board_glinda.fmd

@@ -5,6 +5,6 @@ FLASH 64M {
 		COREBOOT(CBFS)
 		SMMSTORE(PRESERVE) 256K
 		EC_BODY@15872K 256K
-		RW_MRC_CACHE 256K
+		RW_MRC_CACHE 120K
 	}
 }

src/mainboard/amd/birman_plus/chromeos_glinda.fmd

@@ -30,6 +30,6 @@ FLASH@0xFF000000 16M {
 		SMMSTORE(PRESERVE) 256K
 		RW_LEGACY(CBFS)
 		EC_BODY@15872K 256K
-		RW_MRC_CACHE(PRESERVE) 256K
+		RW_MRC_CACHE(PRESERVE) 120K
 	}
 }

src/soc/amd/glinda/Kconfig

@@ -123,7 +123,7 @@ config PSP_APOB_DRAM_ADDRESS
 
 config PSP_APOB_DRAM_SIZE
 	hex
-	default 0x40000
+	default 0x1E000
 
 config PSP_SHAREDMEM_BASE
 	hex