From 36fd23d143002222a1d9dfb1c0ecc2cd77e60abc Mon Sep 17 00:00:00 2001 From: Varun Upadhyay Date: Tue, 18 Feb 2025 09:29:13 +0530 Subject: [PATCH] vc/intel/fsp/twinlake: Update FSP headers from v5222.01 to v5293.00 Update generated FSP headers for Twinlake from v5293.00 Changes include: - Add EnableTcssCovTypeA and MappingPchXhciUsbA in FspsUpd.h - Update UPD Offset in FspsUpd.h BUG=b:390225562 TEST=Able to build and boot google/Trulo Change-Id: I6e0bd39addf9f6d48b27748678c70f54abd79cbe Signed-off-by: Varun Upadhyay Reviewed-on: https://review.coreboot.org/c/coreboot/+/86591 Tested-by: build bot (Jenkins) Reviewed-by: Kapil Porwal Reviewed-by: Subrata Banik --- src/vendorcode/intel/fsp/fsp2_0/twinlake/FspsUpd.h | 13 ++++++++++++- 1 file changed, 12 insertions(+), 1 deletion(-) diff --git a/src/vendorcode/intel/fsp/fsp2_0/twinlake/FspsUpd.h b/src/vendorcode/intel/fsp/fsp2_0/twinlake/FspsUpd.h index add6425988..b5e96c1846 100644 --- a/src/vendorcode/intel/fsp/fsp2_0/twinlake/FspsUpd.h +++ b/src/vendorcode/intel/fsp/fsp2_0/twinlake/FspsUpd.h @@ -3856,7 +3856,18 @@ typedef struct { /** Offset 0x0F96 - Reserved **/ - UINT8 Reserved53[16]; + UINT8 Reserved53[8]; + +/** Offset 0x0F9E - Type C Port x Convert to Type A + Enable / Disable (default) Type C Port x Convert to Type A + $EN_DIS +**/ + UINT8 EnableTcssCovTypeA[4]; + +/** Offset 0x0FA2 - PCH xhci port x for Type C Port x mapping + input PCH xhci port x for Type C Port 0 mapping. +**/ + UINT8 MappingPchXhciUsbA[4]; /** Offset 0x0FA6 - FOMS Control Policy Choose the Foms Control Policy, Default = 0