FSP 1.1 Header Files
Add the common header files for FSP 1.1. The are provided in an EDK2 style tree to allow direct comparison with the EDK2 tree. BRANCH=none BUG=None TEST=Build with FSP Change-Id: I6f7316c8a31ec75d3593c950fe227a776a3e18a5 Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Reviewed-on: https://chromium-review.googlesource.com/229618 Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
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src/vendorcode/intel/fsp/fsp_1_1/IntelFspPkg/Include/FspApi.h
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src/vendorcode/intel/fsp/fsp_1_1/IntelFspPkg/Include/FspApi.h
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/** @file
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Intel FSP API definition from Intel Firmware Support Package External
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Architecture Specification, April 2014, revision 001.
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Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php.
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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**/
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#ifndef _FSP_API_H_
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#define _FSP_API_H_
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#define FSP_STATUS EFI_STATUS
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#define FSPAPI EFIAPI
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/**
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FSP Init continuation function prototype.
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Control will be returned to this callback function after FspInit API call.
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@param[in] Status Status of the FSP INIT API.
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@param[in] HobBufferPtr Pointer to the HOB data structure defined in the PI specification.
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**/
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typedef
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VOID
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(* CONTINUATION_PROC) (
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IN EFI_STATUS Status,
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IN VOID *HobListPtr
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);
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#pragma pack(1)
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typedef struct {
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///
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/// Base address of the microcode region.
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///
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UINT32 MicrocodeRegionBase;
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///
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/// Length of the microcode region.
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///
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UINT32 MicrocodeRegionLength;
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///
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/// Base address of the cacheable flash region.
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///
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UINT32 CodeRegionBase;
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///
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/// Length of the cacheable flash region.
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///
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UINT32 CodeRegionLength;
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} FSP_TEMP_RAM_INIT_PARAMS;
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typedef struct {
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///
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/// Non-volatile storage buffer pointer.
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///
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VOID *NvsBufferPtr;
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///
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/// Runtime buffer pointer
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///
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VOID *RtBufferPtr;
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///
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/// Continuation function address
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///
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CONTINUATION_PROC ContinuationFunc;
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} FSP_INIT_PARAMS;
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typedef struct {
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///
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/// Stack top pointer used by the bootloader.
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/// The new stack frame will be set up at this location after FspInit API call.
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///
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UINT32 *StackTop;
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///
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/// Current system boot mode.
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///
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UINT32 BootMode;
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///
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/// User platform configuraiton data region pointer.
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///
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VOID *UpdDataRgnPtr;
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///
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/// Reserved
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///
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UINT32 Reserved[7];
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} FSP_INIT_RT_COMMON_BUFFER;
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typedef enum {
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///
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/// Notification code for post PCI enuermation
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///
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EnumInitPhaseAfterPciEnumeration = 0x20,
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///
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/// Notification code before transfering control to the payload
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///
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EnumInitPhaseReadyToBoot = 0x40
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} FSP_INIT_PHASE;
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typedef struct {
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///
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/// Notification phase used for NotifyPhase API
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///
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FSP_INIT_PHASE Phase;
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} NOTIFY_PHASE_PARAMS;
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typedef struct {
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///
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/// Non-volatile storage buffer pointer.
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///
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VOID *NvsBufferPtr;
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///
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/// Runtime buffer pointer
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///
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VOID *RtBufferPtr;
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///
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/// Pointer to the HOB data structure defined in the PI specification
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///
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VOID **HobListPtr;
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} FSP_MEMORY_INIT_PARAMS;
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#pragma pack()
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/**
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This FSP API is called soon after coming out of reset and before memory and stack is
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available. This FSP API will load the microcode update, enable code caching for the
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region specified by the boot loader and also setup a temporary stack to be used until
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main memory is initialized.
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A hardcoded stack can be set up with the following values, and the "esp" register
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initialized to point to this hardcoded stack.
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1. The return address where the FSP will return control after setting up a temporary
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stack.
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2. A pointer to the input parameter structure
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However, since the stack is in ROM and not writeable, this FSP API cannot be called
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using the "call" instruction, but needs to be jumped to.
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@param[in] TempRaminitParamPtr Address pointer to the FSP_TEMP_RAM_INIT_PARAMS structure.
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@retval EFI_SUCCESS Temp RAM was initialized successfully.
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@retval EFI_INVALID_PARAMETER Input parameters are invalid.
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@retval EFI_NOT_FOUND No valid microcode was found in the microcode region.
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@retval EFI_UNSUPPORTED The FSP calling conditions were not met.
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@retval EFI_DEVICE_ERROR Temp RAM initialization failed.
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If this function is successful, the FSP initializes the ECX and EDX registers to point to
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a temporary but writeable memory range available to the boot loader and returns with
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FSP_SUCCESS in register EAX. Register ECX points to the start of this temporary
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memory range and EDX points to the end of the range. Boot loader is free to use the
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whole range described. Typically the boot loader can reload the ESP register to point
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to the end of this returned range so that it can be used as a standard stack.
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**/
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typedef
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EFI_STATUS
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(EFIAPI *FSP_TEMP_RAM_INIT) (
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IN FSP_TEMP_RAM_INIT_PARAMS *FspTempRamInitPtr
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);
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/**
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This FSP API is called after TempRamInitEntry. This FSP API initializes the memory,
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the CPU and the chipset to enable normal operation of these devices. This FSP API
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accepts a pointer to a data structure that will be platform dependent and defined for
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each FSP binary. This will be documented in the Integration Guide for each FSP
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release.
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The boot loader provides a continuation function as a parameter when calling FspInit.
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After FspInit completes its execution, it does not return to the boot loader from where
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it was called but instead returns control to the boot loader by calling the continuation
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function which is passed to FspInit as an argument.
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@param[in] FspInitParamPtr Address pointer to the FSP_INIT_PARAMS structure.
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@retval EFI_SUCCESS FSP execution environment was initialized successfully.
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@retval EFI_INVALID_PARAMETER Input parameters are invalid.
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@retval EFI_UNSUPPORTED The FSP calling conditions were not met.
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@retval EFI_DEVICE_ERROR FSP initialization failed.
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**/
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typedef
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EFI_STATUS
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(EFIAPI *FSP_INIT) (
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IN OUT FSP_INIT_PARAMS *FspInitParamPtr
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);
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#define FSP_FSP_INIT FSP_INIT
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/**
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This FSP API is used to notify the FSP about the different phases in the boot process.
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This allows the FSP to take appropriate actions as needed during different initialization
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phases. The phases will be platform dependent and will be documented with the FSP
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release. The current FSP supports two notify phases:
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Post PCI enumeration
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Ready To Boot
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@param[in] NotifyPhaseParamPtr Address pointer to the NOTIFY_PHASE_PRAMS
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@retval EFI_SUCCESS The notification was handled successfully.
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@retval EFI_UNSUPPORTED The notification was not called in the proper order.
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@retval EFI_INVALID_PARAMETER The notification code is invalid.
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**/
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typedef
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EFI_STATUS
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(EFIAPI *FSP_NOTIFY_PHASE) (
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IN NOTIFY_PHASE_PARAMS *NotifyPhaseParamPtr
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);
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/**
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This FSP API is called after TempRamInit and initializes the memory.
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This FSP API accepts a pointer to a data structure that will be platform dependent
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and defined for each FSP binary. This will be documented in Integration guide with
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each FSP release.
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After FspMemInit completes its execution, it passes the pointer to the HobList and
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returns to the boot loader from where it was called. Bootloader is responsible to
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migrate it's stack and data to Memory.
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FspMemoryInit, TempRamExit and FspSiliconInit APIs provide an alternate method to
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complete the silicon initialization and provides bootloader an opportunity to get
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control after system memory is available and before the temporary RAM is torn down.
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These APIs are mutually exclusive to the FspInit API.
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@param[in][out] FspMemoryInitParamPtr Address pointer to the FSP_MEMORY_INIT_PARAMS
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structure.
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@retval EFI_SUCCESS FSP execution environment was initialized successfully.
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@retval EFI_INVALID_PARAMETER Input parameters are invalid.
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@retval EFI_UNSUPPORTED The FSP calling conditions were not met.
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@retval EFI_DEVICE_ERROR FSP initialization failed.
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**/
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typedef
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EFI_STATUS
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(EFIAPI *FSP_MEMORY_INIT) (
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IN OUT FSP_MEMORY_INIT_PARAMS *FspMemoryInitParamPtr
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);
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/**
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This FSP API is called after FspMemoryInit API. This FSP API tears down the temporary
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memory setup by TempRamInit API. This FSP API accepts a pointer to a data structure
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that will be platform dependent and defined for each FSP binary. This will be
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documented in Integration Guide.
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FspMemoryInit, TempRamExit and FspSiliconInit APIs provide an alternate method to
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complete the silicon initialization and provides bootloader an opportunity to get
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control after system memory is available and before the temporary RAM is torn down.
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These APIs are mutually exclusive to the FspInit API.
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@param[in][out] TempRamExitParamPtr Pointer to the Temp Ram Exit parameters structure.
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This structure is normally defined in the Integration Guide.
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And if it is not defined in the Integration Guide, pass NULL.
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@retval EFI_SUCCESS FSP execution environment was initialized successfully.
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@retval EFI_INVALID_PARAMETER Input parameters are invalid.
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@retval EFI_UNSUPPORTED The FSP calling conditions were not met.
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@retval EFI_DEVICE_ERROR FSP initialization failed.
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**/
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typedef
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EFI_STATUS
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(EFIAPI *FSP_TEMP_RAM_EXIT) (
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IN OUT VOID *TempRamExitParamPtr
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);
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/**
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This FSP API is called after TempRamExit API.
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FspMemoryInit, TempRamExit and FspSiliconInit APIs provide an alternate method to complete the
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silicon initialization.
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These APIs are mutually exclusive to the FspInit API.
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@param[in][out] FspSiliconInitParamPtr Pointer to the Silicon Init parameters structure.
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This structure is normally defined in the Integration Guide.
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And if it is not defined in the Integration Guide, pass NULL.
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@retval EFI_SUCCESS FSP execution environment was initialized successfully.
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@retval EFI_INVALID_PARAMETER Input parameters are invalid.
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@retval EFI_UNSUPPORTED The FSP calling conditions were not met.
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@retval EFI_DEVICE_ERROR FSP initialization failed.
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**/
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typedef
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EFI_STATUS
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(EFIAPI *FSP_SILICON_INIT) (
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IN OUT VOID *FspSiliconInitParamPtr
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);
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///
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/// FSP API Return Status Code for backward compatibility with v1.0
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///@{
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#define FSP_SUCCESS EFI_SUCCESS
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#define FSP_INVALID_PARAMETER EFI_INVALID_PARAMETER
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#define FSP_UNSUPPORTED EFI_UNSUPPORTED
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#define FSP_NOT_READY EFI_NOT_READY
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#define FSP_DEVICE_ERROR EFI_DEVICE_ERROR
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#define FSP_OUT_OF_RESOURCES EFI_OUT_OF_RESOURCES
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#define FSP_VOLUME_CORRUPTED EFI_VOLUME_CORRUPTED
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#define FSP_NOT_FOUND EFI_NOT_FOUND
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#define FSP_TIMEOUT EFI_TIMEOUT
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#define FSP_ABORTED EFI_ABORTED
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#define FSP_INCOMPATIBLE_VERSION EFI_INCOMPATIBLE_VERSION
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#define FSP_SECURITY_VIOLATION EFI_SECURITY_VIOLATION
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#define FSP_CRC_ERROR EFI_CRC_ERROR
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///@}
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#endif
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/** @file
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Intel FSP Info Header definition from Intel Firmware Support Package External
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Architecture Specification, April 2014, revision 001.
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Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php.
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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**/
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#ifndef _FSP_INFO_HEADER_H_
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#define _FSP_INFO_HEADER_H_
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#define FSP_HEADER_REVISION_1_0 1
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#define FSP_HEADER_REVISION_1_1 2
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///
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/// Fixed FSP header offset in the FSP image
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///
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#define FSP_INFO_HEADER_OFF 0x94
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#define OFFSET_IN_FSP_INFO_HEADER(x) (UINT32)&((FSP_INFO_HEADER *)(UINTN)0)->x
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#pragma pack(1)
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typedef struct {
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///
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/// Byte 0: Signature ('FSPH') for the FSP Information Header
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///
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UINT32 Signature;
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///
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/// Byte 4: Length of the FSP Information Header
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///
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UINT32 HeaderLength;
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///
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/// Byte 8: Reserved
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///
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UINT8 Reserved1[3];
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///
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/// Byte 11: Revision of the FSP Information Header
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///
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UINT8 HeaderRevision;
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///
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/// Byte 12: Revision of the FSP binary
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///
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UINT32 ImageRevision;
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///
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/// Byte 16: Signature string that will help match the FSP Binary to a supported
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/// hardware configuration.
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///
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CHAR8 ImageId[8];
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///
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/// Byte 24: Size of the entire FSP binary
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///
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UINT32 ImageSize;
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///
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/// Byte 28: FSP binary preferred base address
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///
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UINT32 ImageBase;
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///
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/// Byte 32: Attribute for the FSP binary
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///
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UINT32 ImageAttribute;
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///
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/// Byte 36: Offset of the FSP configuration region
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///
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UINT32 CfgRegionOffset;
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///
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/// Byte 40: Size of the FSP configuration region
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///
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UINT32 CfgRegionSize;
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///
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/// Byte 44: Number of API entries this FSP supports
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///
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UINT32 ApiEntryNum;
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///
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/// Byte 48: The offset for the API to setup a temporary stack till the memory
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/// is initialized.
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///
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UINT32 TempRamInitEntryOffset;
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///
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/// Byte 52: The offset for the API to initialize the CPU and the chipset (SOC)
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///
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UINT32 FspInitEntryOffset;
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///
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/// Byte 56: The offset for the API to inform the FSP about the different stages
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/// in the boot process
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///
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UINT32 NotifyPhaseEntryOffset;
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///
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/// Reserved
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///
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//UINT32 Reserved2;
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///
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/// Byte 60: The offset for the API to initialize the memory
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///
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UINT32 FspMemoryInitEntryOffset;
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///
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/// Byte 64: The offset for the API to tear down temporary RAM
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///
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UINT32 TempRamExitEntryOffset;
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///
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/// Byte 68: The offset for the API to initialize the CPU and chipset
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///
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UINT32 FspSiliconInitEntryOffset;
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} FSP_INFO_HEADER;
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typedef struct {
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///
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/// Byte 0: Signature ('FSPE') for the FSP Extended Information Header
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///
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UINT32 Signature;
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///
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/// Byte 4: Length of the FSP Extended Header
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///
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UINT32 HeaderLength;
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///
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/// Byte 8: Revision of the FSP Extended Header
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///
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UINT8 Revision;
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///
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/// Byte 9: Reserved for future use.
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///
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UINT8 Reserved;
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///
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/// Byte 10: An OEM-supplied string that defines the OEM
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///
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CHAR8 OemId[6];
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///
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/// Byte 16: An OEM-supplied revision number. Larger numbers are assumed to be newer revisions.
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///
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UINT32 OemRevision;
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} FSP_EXTENTED_HEADER;
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#pragma pack()
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#endif
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