From 36edc2e371ce034e23f7daeb87f1962f60ea23be Mon Sep 17 00:00:00 2001
From: Venkateshwar S <vens@qualcomm.corp-partner.google.com>
Date: Mon, 1 Dec 2025 04:09:55 -0800
Subject: [PATCH] soc/qualcomm/x1p42100: Add Dload mode detection and ramdump
 packing

This patch adds support for download mode detection and packing of
ramdump image in CBFS.

Key changes:
1) qclib.c: Add qclib_check_dload_mode() to read TCSR register and
   detect download mode.
2) addressmap.h: Add TCSR_BOOT_MISC_DETECT register and download mode
   cookie definitions.
3) Makefile.mk: Add build rules for ramdump image.

TEST=Create an image.serial.bin and ensure it boots on X1P42100.

Change-Id: I7c6008be79ea0487273e060ac99ddf037111f6fa
Signed-off-by: Venkateshwar S <vens@qualcomm.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/90307
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
---
 src/soc/qualcomm/x1p42100/Makefile.mk         | 26 +++++++++++++++++++
 .../x1p42100/include/soc/addressmap.h         | 11 ++++++++
 src/soc/qualcomm/x1p42100/qclib.c             | 18 +++++++++++++
 3 files changed, 55 insertions(+)

diff --git a/src/soc/qualcomm/x1p42100/Makefile.mk b/src/soc/qualcomm/x1p42100/Makefile.mk
index 787d0db78b..1fd7fb3d2e 100644
--- a/src/soc/qualcomm/x1p42100/Makefile.mk
+++ b/src/soc/qualcomm/x1p42100/Makefile.mk
@@ -320,6 +320,32 @@ $(APDP_META_CBFS)-compression := $(CBFS_COMPRESS_FLAG)
 cbfs-files-y += $(APDP_META_CBFS)
 
 endif # ifeq ($(CONFIG_QC_APDP_ENABLE),y)
+################################################################################
+ifeq ($(CONFIG_QC_RAMDUMP_ENABLE),y)
+
+RAMDUMP_FILE := $(X1P42100_BLOB)/boot/XblRamdump.elf
+RAMDUMP_CBFS := $(CONFIG_CBFS_PREFIX)/ramdump
+$(RAMDUMP_CBFS)-file := $(RAMDUMP_FILE)
+$(RAMDUMP_CBFS)-type := stage
+$(RAMDUMP_CBFS)-compression := $(CBFS_PRERAM_COMPRESS_FLAG)
+cbfs-files-y += $(RAMDUMP_CBFS)
+
+################################################################################
+# Rule to create ramdump_meta from XblRamdump.elf
+# This rule depends on XblRamdump.elf being built and the extractor script existing.
+$(obj)/mainboard/$(MAINBOARDDIR)/ramdump_meta: $(X1P42100_BLOB)/boot/XblRamdump.elf util/qualcomm/elf_segment_extractor.py
+	@echo "Extracting ELF headers and hash table segment from $< to $@"
+	@util/qualcomm/elf_segment_extractor.py --eh --pht --hashtable $< $@
+
+RAMDUMP_META_FILE := $(obj)/mainboard/$(MAINBOARDDIR)/ramdump_meta
+RAMDUMP_META_CBFS := $(CONFIG_CBFS_PREFIX)/ramdump_meta
+$(RAMDUMP_META_CBFS)-file := $(RAMDUMP_META_FILE)
+$(RAMDUMP_META_CBFS)-type := raw
+$(RAMDUMP_META_CBFS)-compression := $(CBFS_COMPRESS_FLAG)
+cbfs-files-y += $(RAMDUMP_META_CBFS)
+
+endif # ifeq ($(CONFIG_QC_RAMDUMP_ENABLE),y)
+
 endif # ifeq ($(CONFIG_USE_QC_BLOBS),y)
 
 endif # ifeq ($(CONFIG_QC_BLOBS_UPSTREAM),y)
diff --git a/src/soc/qualcomm/x1p42100/include/soc/addressmap.h b/src/soc/qualcomm/x1p42100/include/soc/addressmap.h
index 4df4cc99eb..11b6f794af 100644
--- a/src/soc/qualcomm/x1p42100/include/soc/addressmap.h
+++ b/src/soc/qualcomm/x1p42100/include/soc/addressmap.h
@@ -4,6 +4,7 @@
 #define _SOC_QUALCOMM_X1P42100_ADDRESS_MAP_H_
 
 #include <stdint.h>
+#include <types.h>
 
 #define AOSS_CC_BASE			0x0C2A0000
 #define QSPI_BASE			0x088DC000
@@ -176,6 +177,16 @@
 #define TCSR_GCC_USB2_2_CLKREF_EN_ADDR		((void *)0x1FD5118)
 #define USB_CLKREF_ENABLE_VALUE			0x1
 
+/* TCSR Boot Misc Detect Register for Download Mode */
+#define TCSR_BOOT_MISC_DETECT		0x1FD9000
+
+/* Bits 4 and 5 represent the ramdump download cookies in SoC logic */
+enum dload_mode_cookies {
+	DLOAD_FULL_DUMP = BIT(4),
+	DLOAD_MINI_DUMP = BIT(5),
+	DLOAD_BOTH = (DLOAD_FULL_DUMP | DLOAD_MINI_DUMP)
+};
+
 /* SPMI PMIC ARB */
 #define SPMI_PMIC_ARB_CORE_BASE		0x0C400000
 #define FIRST_APID_MAP_OFFSET		0x2000
diff --git a/src/soc/qualcomm/x1p42100/qclib.c b/src/soc/qualcomm/x1p42100/qclib.c
index ea1424c402..33de115dcf 100644
--- a/src/soc/qualcomm/x1p42100/qclib.c
+++ b/src/soc/qualcomm/x1p42100/qclib.c
@@ -6,6 +6,24 @@
 #include <soc/qclib_common.h>
 #include <device/mmio.h>
 #include <soc/symbols_common.h>
+#include <soc/addressmap.h>
+
+bool qclib_check_dload_mode(void)
+{
+	if (!CONFIG(QC_RAMDUMP_ENABLE))
+		return false;
+
+	uint32_t boot_misc_detect = read32((void *)TCSR_BOOT_MISC_DETECT);
+
+	if (boot_misc_detect & DLOAD_BOTH) {
+		printk(BIOS_DEBUG, "Download mode detected: 0x%x\n", boot_misc_detect);
+		return true;
+	}
+
+	printk(BIOS_DEBUG, "Download mode not enabled (TCSR value: 0x%x)\n",
+	       boot_misc_detect);
+	return false;
+}
 
 int qclib_soc_override(struct qclib_cb_if_table *table)
 {