From 36632a08a883a2fe53d76e271e919cb11805e55e Mon Sep 17 00:00:00 2001 From: Swathi Tamilselvan Date: Tue, 25 Nov 2025 11:55:44 +0530 Subject: [PATCH] soc/qualcomm/x1p42100: Reserve 33 MB DRAM memory for Display requirement Add support to reserve 33 MB DRAM memory for display in memlayout.ld file. TEST=Create an image.serial.bin and ensure it boots on X1P42100. Basic device boot functionality with the specified memory reservation has been validated. Display functionality has not yet been tested, as the display driver porting is yet to be done. Change-Id: I49a4a20b9869bc5cf0b11f4eb6cff7865bb2e761 Signed-off-by: Swathi Tamilselvan Reviewed-on: https://review.coreboot.org/c/coreboot/+/90242 Reviewed-by: Kapil Porwal Reviewed-by: Subrata Banik Tested-by: build bot (Jenkins) --- src/soc/qualcomm/common/include/soc/symbols_common.h | 1 + src/soc/qualcomm/x1p42100/memlayout.ld | 7 ++++++- src/soc/qualcomm/x1p42100/soc.c | 1 + 3 files changed, 8 insertions(+), 1 deletion(-) diff --git a/src/soc/qualcomm/common/include/soc/symbols_common.h b/src/soc/qualcomm/common/include/soc/symbols_common.h index 7df10ecde2..f679a6a2ab 100644 --- a/src/soc/qualcomm/common/include/soc/symbols_common.h +++ b/src/soc/qualcomm/common/include/soc/symbols_common.h @@ -45,6 +45,7 @@ DECLARE_REGION(dram_llcc_lpi) DECLARE_REGION(dram_ta) DECLARE_REGION(dram_pdp) DECLARE_REGION(dram_pil) +DECLARE_REGION(dram_display) /* * DDR_SPACE (2 GB) aka `_dram`: 0x80000000 - 0x100000000 diff --git a/src/soc/qualcomm/x1p42100/memlayout.ld b/src/soc/qualcomm/x1p42100/memlayout.ld index c93ed62462..3cb7506668 100644 --- a/src/soc/qualcomm/x1p42100/memlayout.ld +++ b/src/soc/qualcomm/x1p42100/memlayout.ld @@ -26,7 +26,11 @@ * | dram_acdb | | | * +----------------------------------------------------------+ | | * | ... Usable memory ... | | | - * 0xDF4C0000 +----------------------------------------------------------+ | | + * 0xE69C0000 +----------------------------------------------------------+ | | + * | dram_display | | | + * 0xE4800000 +----------------------------------------------------------+ | | + * | ... Usable memory ... | | | + * 0xD9600000 +----------------------------------------------------------+ | | * | dram_ta | | | * 0xD8600000 +----------------------------------------------------------+ | | * | BL31 (ARM Trusted Firmware) | | | @@ -237,6 +241,7 @@ SECTIONS REGION(dram_tz, 0xD8000000, 0x56A000, 4K) BL31(0xD856A000, 600K) REGION(dram_ta, 0xD8600000, 0x1000000, 4K) + REGION(dram_display, 0xE4800000, 0x21C0000, 4K) REGION(dram_llcc_lpi, 0xFF800000, 0x600000, 4K) REGION(dram_smem, 0xFFE00000, 0x200000, 4K) DRAM_END(0x100000000) diff --git a/src/soc/qualcomm/x1p42100/soc.c b/src/soc/qualcomm/x1p42100/soc.c index d4fdb87396..b4afd98139 100644 --- a/src/soc/qualcomm/x1p42100/soc.c +++ b/src/soc/qualcomm/x1p42100/soc.c @@ -49,6 +49,7 @@ static void soc_read_resources(struct device *dev) reserved_ram_range(dev, index++, (uintptr_t)_dram_wlan, REGION_SIZE(dram_wlan)); reserved_ram_range(dev, index++, (uintptr_t)_dram_pil, REGION_SIZE(dram_pil)); reserved_ram_range(dev, index++, (uintptr_t)_dram_ta, REGION_SIZE(dram_ta)); + reserved_ram_range(dev, index++, (uintptr_t)_dram_display, REGION_SIZE(dram_display)); /* ACDB carveout region located at 0xFF800000 - (n*5.5 +1+32+3) where n is size of DDR */ reserved_ram_range(dev, index++, (uintptr_t)(_dram_llcc_lpi - calc_acdb_carveout_size()),