From 350fa4e519c1320216ccdcb4ccf1a0224ec65e0d Mon Sep 17 00:00:00 2001 From: "Ronald G. Minnich" Date: Mon, 15 Oct 2001 13:51:46 +0000 Subject: [PATCH] comment out a bad idea -- no need to enable IDE here. --- src/southbridge/acer/m1535/southbridge.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/src/southbridge/acer/m1535/southbridge.c b/src/southbridge/acer/m1535/southbridge.c index 94c96c8cba..a3e687b68c 100644 --- a/src/southbridge/acer/m1535/southbridge.c +++ b/src/southbridge/acer/m1535/southbridge.c @@ -7,6 +7,7 @@ void southbridge_fixup() { struct pci_dev *pcidev; + unsigned char c; pcidev = pci_find_device(PCI_VENDOR_ID_ACER, PCI_DEVICE_ID_ACER_M1535D, (void *)NULL); @@ -21,9 +22,19 @@ southbridge_fixup() /* ENABLE SERIAL IRQ */ pci_write_config_byte(pcidev, 0x70, 0x8); +// BAD IDEA. This has to be done much earlier in the process! +// So it is done in chipset_init.inc +#if 0 /* ENABLE IDE CONTROLLER */ pci_write_config_byte(pcidev, 0x58, 0x4c); + /* ENABLE read/write BARs on IDE controller*/ + pci_read_config_byte(pcidev, 0x9, &c); + printk_err("1535 south bridge reg 9 was 0x%x ..", c); + c |= 5; + printk_err("set to 0x%x\n", c); + pci_write_config_byte(pcidev, 0x9, c); +#endif } void nvram_on()