drivers/intel/fsp2_0: Add FSP 2.2 specific support

• Based on FSP EAS v2.1 – Backward compatibility is retained.
• Add multi-phase silicon initialization to increase the modularity of the
FspSiliconInit() API.
• Add FspMultiPhaseSiInit() API
• FSP_INFO_HEADER changes
   o Added FspMultiPhaseSiInitEntryOffset
• Add FSPS_ARCH_UPD
   o Added EnableMultiPhaseSiliconInit, bootloaders designed for
     FSP 2.0/2.1 can disable the FspMultiPhaseSiInit() API and
     continue to use FspSiliconInit() without change.

FSP 2.2 Specification:
https://www.intel.com/content/www/us/en/intelligent-systems/intel-firmware-support-package/intel-fsp-overview.html

Change-Id: If7177a267f3a9b4cbb60a639f1c737b9a3341913
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41728
Reviewed-by: Srinidhi N Kaushik <srinidhi.n.kaushik@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/include/console/post_codes.h

@@ -288,6 +288,20 @@
  */
 #define POST_FSP_SILICON_EXIT			0x99
 
+/**
+ * \brief Before calling FSP Multiphase SiliconInit
+ *
+ * Going to call into FSP binary for Multiple phase SI Init
+ */
+#define POST_FSP_MULTI_PHASE_SI_INIT_ENTRY	0xa0
+
+/**
+ * \brief After calling FSP Multiphase SiliconInit
+ *
+ * FSP binary returned from Multiple phase SI Init
+ */
+#define POST_FSP_MULTI_PHASE_SI_INIT_EXIT	0xa1
+
 /**
  * \brief Entry into elf boot
  *