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soc/intel/cmn/cse: Add function to check if ME state is M3_NO_UMA

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When soft-disabled, boards which select SOC_INTEL_CSE_LITE_SKU boot
with their working state having a value of M3_NO_UMA (0x4), as
opposed to the "normal" value of M0_NO_UMA (0x5). Add a define for
this value (taken from older ME code in coreboot) and add a function
to check if the CSE is in that state, which will be used in a
subsequent commit.

TEST=tested with rest of patch train

Change-Id: I405987ece00b3849a9fcdf1bfc8b377fd8d010dc
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/87516
Reviewed-by: Sean Rhodes <sean@starlabs.systems>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jérémy Compostella <jeremy.compostella@intel.com>
This commit is contained in:
Matt DeVillier 2025-05-02 10:34:01 -05:00
commit 33b3269d91
2 changed files with 14 additions and 0 deletions
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7
src/soc/intel/common/block/cse/cse.c
View file

@ -268,6 +268,13 @@ bool cse_is_hfs1_cws_normal(void)
return false;
}
bool cse_is_hfs1_cws_m3_no_uma(void)
{
union me_hfsts1 hfs1;
hfs1.data = me_read_config32(PCI_ME_HFSTS1);
return hfs1.fields.working_state == ME_HFS1_CWS_M3_NO_UMA;
}
bool cse_is_hfs1_com_normal(void)
{
return cse_check_hfs1_com(ME_HFS1_COM_NORMAL);

7
src/soc/intel/common/block/include/intelblocks/cse.h
View file

@ -57,6 +57,7 @@ enum mkhi_group_id {
#define MKHI_BUP_COMMON_GET_BOOT_PERF_DATA 0x8
/* ME Current Working States */
#define ME_HFS1_CWS_M3_NO_UMA 0x4
#define ME_HFS1_CWS_NORMAL 0x5
/* ME Current Operation Modes */
@ -453,6 +454,12 @@ void print_me_fw_version(void *unused);
*/
bool cse_is_hfs1_cws_normal(void);
/*
* Checks current working operation state is M3_NO_UMA or not.
* Returns true if CSE's current working state is M3_NO_UMA, otherwise false.
*/
bool cse_is_hfs1_cws_m3_no_uma(void);
/*
* Checks CSE's current operation mode is normal or not.
* Returns true if CSE's current operation mode is normal, otherwise false.