From 32654a4d0b1c19a08d2ffde2901dd427f7633fba Mon Sep 17 00:00:00 2001 From: Jamie Ryu Date: Mon, 16 Dec 2024 18:59:26 -0800 Subject: [PATCH] soc/intel/pantherlake: Update Crashlog config MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This will configure CpuCrashLogEnable regardless of Tracehub configuration as Crashlog feature does not have a dependency with Tracehub. TEST=Build fatcat and check Crashlog is enabled without enabling Tracehub. Change-Id: I6f37e9f4a1f55ffc576af955c92d4073068eb97a Signed-off-by: Jamie Ryu Reviewed-on: https://review.coreboot.org/c/coreboot/+/85614 Reviewed-by: Subrata Banik Tested-by: build bot (Jenkins) Reviewed-by: Jérémy Compostella --- src/soc/intel/pantherlake/romstage/fsp_params.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/soc/intel/pantherlake/romstage/fsp_params.c b/src/soc/intel/pantherlake/romstage/fsp_params.c index 7d965fd496..5b968918b2 100644 --- a/src/soc/intel/pantherlake/romstage/fsp_params.c +++ b/src/soc/intel/pantherlake/romstage/fsp_params.c @@ -249,11 +249,12 @@ static void fill_fspm_vtd_params(FSP_M_CONFIG *m_cfg, static void fill_fspm_trace_params(FSP_M_CONFIG *m_cfg, const struct soc_intel_pantherlake_config *config) { + m_cfg->CpuCrashLogEnable = CONFIG(SOC_INTEL_CRASHLOG); + if (!CONFIG(SOC_INTEL_COMMON_BLOCK_TRACEHUB)) return; m_cfg->PlatformDebugOption = CONFIG_SOC_INTEL_COMMON_DEBUG_CONSENT; - m_cfg->CpuCrashLogEnable = CONFIG(SOC_INTEL_CRASHLOG); switch (CONFIG_SOC_INTEL_COMMON_DEBUG_CONSENT) { case HW_DEBUG_TRACEHUB_ACTIVE: