soc/intel: Use chipset.cb for XDCI device ops linking

Move XDCI device operations linking from PCI Device ID matching
to chipset.cb files for all Intel SoCs that have them, matching the
approach used by Skylake.

Remove corresponding DIDs from xdci.c for these SoCs; keep DID
matching only for SoCs without chipset.cb files.

This standardizes the approach across Intel SoCs and makes the
XDCI controller configuration explicit in devicetree, and prevents
the endless proliferation of DIDs in the common driver code.

Change-Id: Ie8f8b5a952d072ecd1721bc8537734e85769b09d
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/90921
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jakub "Kuba" Czapiga <czapiga@google.com>

src/soc/intel/alderlake/chipset.cb

@@ -168,7 +168,7 @@ chip soc/intel/alderlake
 				end
 			end
 		end
-		device pci 0d.1 alias tcss_xdci off end
+		device pci 0d.1 alias tcss_xdci off ops usb_xdci_ops end
 		device pci 0d.2 alias tcss_dma0 off end
 		device pci 0d.3 alias tcss_dma1 off end
 		device pci 0e.0 alias vmd off end

src/soc/intel/alderlake/chipset_pch_s.cb

@@ -360,7 +360,7 @@ chip soc/intel/alderlake
 				end
 			end
 		end
-		device pci 14.1 alias xdci off end
+		device pci 14.1 alias xdci off ops usb_xdci_ops end
 		device pci 14.2 alias shared_sram off end
 		device pci 14.3 alias cnvi_wifi off end
 		device pci 15.0 alias i2c0 off ops i2c_dev_ops end

src/soc/intel/apollolake/chipset_apl.cb

@@ -23,7 +23,7 @@ chip soc/intel/apollolake
 		device pci 14.0 alias pcie_rp05		off ops pcie_rp_ops	end # PCIE Express Root Port 5
 		device pci 14.1 alias pcie_rp06		off ops pcie_rp_ops	end # PCIE Express Root Port 6
 		device pci 15.0 alias xhci		off ops usb_xhci_ops end # XHCI
-		device pci 15.1 alias xdci		off	end # XDCI
+		device pci 15.1 alias xdci		off ops usb_xdci_ops end # XDCI
 		device pci 16.0 alias i2c0		off ops i2c_dev_ops end # I2C0
 		device pci 16.1 alias i2c1		off ops i2c_dev_ops end # I2C1
 		device pci 16.2 alias i2c2		off ops i2c_dev_ops end # I2C2

src/soc/intel/apollolake/chipset_glk.cb

@@ -24,7 +24,7 @@ chip soc/intel/apollolake
 		device pci 14.0 alias pcie_rp05		off ops pcie_rp_ops	end # PCIE Express Root Port 5
 		device pci 14.1 alias pcie_rp06		off ops pcie_rp_ops	end # PCIE Express Root Port 6
 		device pci 15.0 alias xhci		off ops usb_xhci_ops end # XHCI
-		device pci 15.1 alias xdci		off	end # XDCI
+		device pci 15.1 alias xdci		off ops usb_xdci_ops end # XDCI
 		device pci 16.0 alias i2c0		off ops i2c_dev_ops end # I2C0
 		device pci 16.1 alias i2c1		off ops i2c_dev_ops end # I2C1
 		device pci 16.2 alias i2c2		off ops i2c_dev_ops end # I2C2

src/soc/intel/cannonlake/chipset.cb

@@ -78,7 +78,7 @@ chip soc/intel/cannonlake
 				end
 			end
 		end
-		device pci 14.1 alias xdci         off	end	# USB xDCI (OTG)
+		device pci 14.1 alias xdci         off ops usb_xdci_ops end	# USB xDCI (OTG)
 		device pci 14.2 alias shared_sram  off  end	# Shared SRAM
 		device pci 14.3 alias cnvi_wifi    off	end	# CNVi Wifi
 		device pci 14.5 alias sdxc         off	end	# SDCard

src/soc/intel/cannonlake/chipset_pch_h.cb

@@ -102,7 +102,7 @@ chip soc/intel/cannonlake
 				end
 			end
 		end
-		device pci 14.1 alias xdci         off	end	# USB xDCI (OTG)
+		device pci 14.1 alias xdci         off ops usb_xdci_ops end	# USB xDCI (OTG)
 		device pci 14.2 alias shared_sram  off  end	# Shared SRAM
 		device pci 14.3 alias cnvi_wifi    off	end	# CNVi Wifi
 		device pci 14.5 alias sdxc         off	end	# SDCard

src/soc/intel/common/block/xdci/xdci.c

@@ -29,26 +29,7 @@ struct device_operations usb_xdci_ops = {
 
 static const unsigned short pci_device_ids[] = {
 	PCI_DID_INTEL_NVL_XDCI,
-	PCI_DID_INTEL_WCL_XDCI,
-	PCI_DID_INTEL_PTL_H_XDCI,
-	PCI_DID_INTEL_PTL_U_H_XDCI,
-	PCI_DID_INTEL_MTL_XDCI,
-	PCI_DID_INTEL_ARL_XDCI,
-	PCI_DID_INTEL_ARP_S_XDCI,
-	PCI_DID_INTEL_APL_XDCI,
-	PCI_DID_INTEL_CNL_LP_XDCI,
-	PCI_DID_INTEL_GLK_XDCI,
-	PCI_DID_INTEL_CNP_H_XDCI,
-	PCI_DID_INTEL_CMP_LP_XDCI,
-	PCI_DID_INTEL_CMP_H_XDCI,
-	PCI_DID_INTEL_TGP_LP_XDCI,
-	PCI_DID_INTEL_TGP_H_XDCI,
 	PCI_DID_INTEL_MCC_XDCI,
-	PCI_DID_INTEL_JSP_XDCI,
-	PCI_DID_INTEL_ADP_P_XDCI,
-	PCI_DID_INTEL_ADP_S_XDCI,
-	PCI_DID_INTEL_ADP_M_XDCI,
-	PCI_DID_INTEL_RPP_S_XDCI,
 	0
 };
 

src/soc/intel/jasperlake/chipset.cb

@@ -61,7 +61,7 @@ chip soc/intel/jasperlake
 				end
 			end
 		end
-		device pci 14.1 alias south_xdci	off end
+		device pci 14.1 alias south_xdci	off ops usb_xdci_ops end
 		device pci 14.2 alias shared_ram	off end
 		device pci 14.3 alias cnvi_wifi		off end
 		device pci 14.5 alias sdxc		off end

src/soc/intel/meteorlake/chipset.cb

@@ -87,7 +87,7 @@ chip soc/intel/meteorlake
 				end
 			end
 		end
-		device pci 0d.1 alias tcss_xdci off end
+		device pci 0d.1 alias tcss_xdci off ops usb_xdci_ops end
 		device pci 0d.2 alias tcss_dma0 off end
 		device pci 0d.3 alias tcss_dma1 off end
 		device pci 0e.0 alias vmd off end

src/soc/intel/pantherlake/chipset_ptl.cb

@@ -162,7 +162,7 @@ chip soc/intel/pantherlake
 				end
 			end
 		end
-		device pci 0d.1 alias tcss_xdci off end
+		device pci 0d.1 alias tcss_xdci off ops usb_xdci_ops end
 		device pci 0d.2 alias tcss_dma0 off end
 		device pci 0d.3 alias tcss_dma1 off end
 		device pci 0e.0 alias vmd off end

src/soc/intel/tigerlake/chipset.cb

@@ -112,7 +112,7 @@ chip soc/intel/tigerlake
 				end
 			end
 		end
-		device pci 14.1 alias south_xdci off end
+		device pci 14.1 alias south_xdci off ops usb_xdci_ops end
 		device pci 14.2 alias shared_ram off end
 		device pci 14.3 alias cnvi_wifi off end
 		device pci 15.0 alias i2c0 off ops i2c_dev_ops end

src/soc/intel/tigerlake/chipset_pch_h.cb

@@ -134,7 +134,7 @@ chip soc/intel/tigerlake
 				end
 			end
 		end
-		device pci 14.1 alias south_xdci off end
+		device pci 14.1 alias south_xdci off ops usb_xdci_ops end
 		device pci 14.2 alias shared_ram off end
 		device pci 14.3 alias cnvi_wifi off end
 		device pci 15.0 alias i2c0 off ops i2c_dev_ops end