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mb/amd/birman_plus: Skip i2c_early init

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Early init is only required for I2C2 since the DDI1 connector type
must be probed in romstage. The other I2C busses aren't used at the
moment and there's no need for early init.

TEST=Display init on amd/birman_plus still works. I2C0, I2C1 and I2C3
     are initialized in ramstage after FSPS.

Change-Id: I0491d03464b675d18e42324580c91642aae4e727
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/87963
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Maximilian Brune <maximilian.brune@9elements.com>
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
This commit is contained in:
Patrick Rudolph 2025-06-05 10:04:25 +02:00 • committed by Matt DeVillier
commit 30865c2fb1
3 changed files with 0 additions and 20 deletions
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4
src/mainboard/amd/birman_plus/devicetree_glinda.cb
View file

@ -23,11 +23,7 @@ chip soc/amd/glinda
register "i2c_scl_reset" = "GPIO_I2C0_SCL | GPIO_I2C1_SCL |
GPIO_I2C2_SCL | GPIO_I2C3_SCL"
register "i2c[0].early_init" = "1"
register "i2c[1].early_init" = "1"
register "i2c[2].early_init" = "1"
register "i2c[3].early_init" = "1"
# I2C Pad Control RX Select Configuration
register "i2c_pad[0].rx_level" = "I2C_PAD_RX_1_8V"

4
src/mainboard/amd/birman_plus/devicetree_phoenix.cb
View file

@ -25,11 +25,7 @@ chip soc/amd/phoenix
register "i2c_scl_reset" = "GPIO_I2C0_SCL | GPIO_I2C1_SCL |
GPIO_I2C2_SCL | GPIO_I2C3_SCL"
register "i2c[0].early_init" = "1"
register "i2c[1].early_init" = "1"
register "i2c[2].early_init" = "1"
register "i2c[3].early_init" = "1"
# I2C Pad Control RX Select Configuration
register "i2c_pad[0].rx_level" = "I2C_PAD_RX_1_8V"

12
src/mainboard/amd/birman_plus/early_gpio.c
View file

@ -54,22 +54,10 @@ static const struct soc_amd_gpio gpio_set_stage_reset[] = {
/* FANOUT0 */
PAD_NF(GPIO_85, FANOUT0, PULL_NONE),
/* I2C0 SCL */
PAD_NF(GPIO_145, I2C0_SCL, PULL_NONE),
/* I2C0 SDA */
PAD_NF(GPIO_146, I2C0_SDA, PULL_NONE),
/* I2C1 SCL */
PAD_NF(GPIO_147, I2C1_SCL, PULL_NONE),
/* I2C1 SDA */
PAD_NF(GPIO_148, I2C1_SDA, PULL_NONE),
/* I2C2_SCL */
PAD_NF(GPIO_113, I2C2_SCL, PULL_NONE),
/* I2C2_SDA */
PAD_NF(GPIO_114, I2C2_SDA, PULL_NONE),
/* I2C3_SCL */
PAD_NF(GPIO_19, I2C3_SCL, PULL_NONE),
/* I2C3_SDA */
PAD_NF(GPIO_20, I2C3_SDA, PULL_NONE),
};
void mainboard_program_early_gpios(void)