From 3053cd2dad10139879e2d171c0a6ebbf3bb6ff75 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Micha=C5=82=20=C5=BBygowski?= Date: Mon, 6 Oct 2025 12:09:46 +0200 Subject: [PATCH] soc/amd/common/acpi/lpc.asl: Report fixed base addresses MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On systems with AMD ROM armor enabled the SPI base address register in LPC bridge PCI device space is not accessible (returns all FFs). In such case the AML code will not be able to retrieve the SPI BAR and report it properly. Use fixed bases instead to avoid running into this problem in the future. Change-Id: Ia01508e5ddf2da053f9bf4116c5e05b89500f772 Signed-off-by: Michał Żygowski Reviewed-on: https://review.coreboot.org/c/coreboot/+/89488 Reviewed-by: Patrick Rudolph Tested-by: build bot (Jenkins) --- src/soc/amd/common/acpi/lpc.asl | 12 ++++-------- 1 file changed, 4 insertions(+), 8 deletions(-) diff --git a/src/soc/amd/common/acpi/lpc.asl b/src/soc/amd/common/acpi/lpc.asl index 254fc69793..d253c68140 100644 --- a/src/soc/amd/common/acpi/lpc.asl +++ b/src/soc/amd/common/acpi/lpc.asl @@ -1,5 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ +#include + #if MAINBOARD_HAS_SPEAKER #define IO61_HID "PNP0800" /* AT style speaker */ #else @@ -14,10 +16,6 @@ Device(LPCB) { * DBGO("\\_SB\\PCI0\\LpcIsaBr\\_INI\n") } */ /* End Method(_SB.SBRDG._INI) */ - OperationRegion(CFG,PCI_Config,0x0,0x100) // Map PCI Configuration Space - Field(CFG,DWordAcc,NoLock,Preserve){ - Offset(0xA0), - BAR,32} // SPI Controller Base Address Register (Index 0xA0) Device(LDRC) // LPC device: Resource consumption { @@ -42,10 +40,8 @@ Device(LPCB) { { CreateDwordField(^CRS,^BAR0._BAS,SPIB) // Field to hold SPI base address CreateDwordField(^CRS,^BAR1._BAS,ESPB) // Field to hold eSPI base address - Local0 = BAR & 0xffffff00 - SPIB = Local0 // SPI base address mapped - Local1 = Local0 + 0x10000 - ESPB = Local1 // eSPI base address mapped + SPIB = SPI_BASE_ADDRESS // SPI base address mapped + ESPB = SPIB + 0x10000 // eSPI base address mapped Return(CRS) } }