From 2f65153602f24c3e3e61f3077d1a19680d41b9a6 Mon Sep 17 00:00:00 2001 From: Sean Rhodes Date: Tue, 18 Mar 2025 13:44:49 +0000 Subject: [PATCH] mb/starlabs/starbook/adl_n: Disconnected unused GPIOs This pins aren't connected to anything so adjust them accordingly. Change-Id: I906e3b555e7ae802f6c14285ad8a5b98f43b2f36 Signed-off-by: Sean Rhodes Reviewed-on: https://review.coreboot.org/c/coreboot/+/86918 Tested-by: build bot (Jenkins) Reviewed-by: Matt DeVillier --- src/mainboard/starlabs/starbook/variants/adl_n/gpio.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/src/mainboard/starlabs/starbook/variants/adl_n/gpio.c b/src/mainboard/starlabs/starbook/variants/adl_n/gpio.c index 3c5c7d0b97..1c17b974e4 100644 --- a/src/mainboard/starlabs/starbook/variants/adl_n/gpio.c +++ b/src/mainboard/starlabs/starbook/variants/adl_n/gpio.c @@ -151,17 +151,17 @@ const struct pad_config gpio_table[] = { High: Enabled */ PAD_CFG_GPO(GPP_C2, 1, PLTRST), /* C3: SML 0 Clock */ - PAD_CFG_NF(GPP_C3, NONE, DEEP, NF1), + PAD_NC(GPP_C3, NONE), /* C4: SML 0 Data */ - PAD_CFG_NF(GPP_C4, NONE, DEEP, NF1), + PAD_NC(GPP_C4, NONE), /* C5: Boot Strap Weak Internal PD 20K Low: ESPI High: Disabled */ PAD_CFG_GPO(GPP_C5, 0, DEEP), /* C6: SML 1 Clock */ - PAD_CFG_NF(GPP_C6, NONE, DEEP, NF1), + PAD_NC(GPP_C6, NONE), /* C7: SML 1 Data */ - PAD_CFG_NF(GPP_C7, NONE, DEEP, NF1), + PAD_NC(GPP_C7, NONE), /* C8: Not Connected */ PAD_NC(GPP_C8, NONE), /* C9: Not Connected */