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mb/siemens/mc_ehl{2...4}: Simplify SD code as well as for mc_ehl5

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The latest patch chain for mc_ehl5, commit 2d9a82cf8a
("mb/siemens/mc_ehl5: Rename SDIO converge layer register defines") and
following patches, have simplified the SD card code. This patch now
adapts the other mc_ehl mainboards accordingly to standardize the code.

Change-Id: Ieb2d540656408d2ce57a34e3e443b4273b9c48bb
Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/85864
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-by: Uwe Poeche <uwe.poeche@siemens.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Mario Scheithauer 2025-01-06 10:47:43 +01:00 • committed by Werner Zeh
commit 2f4662c628
3 changed files with 56 additions and 51 deletions
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37
src/mainboard/siemens/mc_ehl/variants/mc_ehl2/mainboard.c
View file

@ -10,12 +10,21 @@
#define HOSTCTRL2 0x3E
#define HOSTCTRL2_PRESET (1 << 15)
#define SD_CAP_BYP 0x810
#define SD_CAP_BYP_EN 0x5A
#define SD_CAP_BYP_REG1 0x814
#define SD_CAP_BYP_SDR50 (1 << 13)
#define SD_CAP_BYP_SDR104 (1 << 14)
#define SD_CAP_BYP_DDR50 (1 << 15)
#define MMC_CAP_BYP 0x810
#define MMC_CAP_BYP_EN 0x5A
#define MMC_CAP_BYP_REG1 0x814
#define MMC_CAP_BYP_SDR50 (1 << 13)
#define MMC_CAP_BYP_SDR104 (1 << 14)
#define MMC_CAP_BYP_DDR50 (1 << 15)
/* Disable SDR104 and SDR50 mode while keeping DDR50 mode enabled. */
static void disable_sdr_modes(struct resource *res)
{
write32(res2mmio(res, MMC_CAP_BYP, 0), MMC_CAP_BYP_EN);
clrsetbits32(res2mmio(res, MMC_CAP_BYP_REG1, 0),
MMC_CAP_BYP_SDR104 | MMC_CAP_BYP_SDR50,
MMC_CAP_BYP_DDR50);
}
void variant_mainboard_final(void)
{
@ -30,26 +39,16 @@ void variant_mainboard_final(void)
if (dev)
pci_write_config8(dev, 0xd8, 0x3e);
/* Limit SD-Card speed to DDR50 mode to avoid SDR104/SDR50 modes due to
layout limitations. */
dev = pcidev_path_on_root(PCH_DEVFN_SDCARD);
if (dev) {
uint32_t reg;
uint16_t reg16;
struct resource *res = probe_resource(dev, PCI_BASE_ADDRESS_0);
if (!res)
return;
write32(res2mmio(res, SD_CAP_BYP, 0), SD_CAP_BYP_EN);
reg = read32(res2mmio(res, SD_CAP_BYP_REG1, 0));
/* Disable SDR104 and SDR50 mode while keeping DDR50 mode enabled. */
reg &= ~(SD_CAP_BYP_SDR104 | SD_CAP_BYP_SDR50);
reg |= SD_CAP_BYP_DDR50;
write32(res2mmio(res, SD_CAP_BYP_REG1, 0), reg);
disable_sdr_modes(res);
/* Use preset driver strength from preset value registers. */
reg16 = read16(res2mmio(res, HOSTCTRL2, 0));
reg16 |= HOSTCTRL2_PRESET;
write16(res2mmio(res, HOSTCTRL2, 0), reg16);
clrsetbits16(res2mmio(res, HOSTCTRL2, 0), 0, HOSTCTRL2_PRESET);
}
}

41
src/mainboard/siemens/mc_ehl/variants/mc_ehl3/mainboard.c
View file

@ -2,43 +2,44 @@
#include <baseboard/variants.h>
#include <bootstate.h>
#include <device/mmio.h>
#include <device/pci_ids.h>
#include <gpio.h>
#include <intelblocks/pcr.h>
#include <soc/pci_devs.h>
#include <soc/pcr_ids.h>
#define HOSTCTRL2 0x3E
#define HOSTCTRL2_PRESET (1 << 15)
#define SD_CAP_BYP 0x810
#define SD_CAP_BYP_EN 0x5A
#define SD_CAP_BYP_REG1 0x814
#define SD_CAP_BYP_SDR50 (1 << 13)
#define SD_CAP_BYP_SDR104 (1 << 14)
#define SD_CAP_BYP_DDR50 (1 << 15)
#define MMC_CAP_BYP 0x810
#define MMC_CAP_BYP_EN 0x5A
#define MMC_CAP_BYP_REG1 0x814
#define MMC_CAP_BYP_SDR50 (1 << 13)
#define MMC_CAP_BYP_SDR104 (1 << 14)
#define MMC_CAP_BYP_DDR50 (1 << 15)
/* Disable SDR104 and SDR50 mode while keeping DDR50 mode enabled. */
static void disable_sdr_modes(struct resource *res)
{
write32(res2mmio(res, MMC_CAP_BYP, 0), MMC_CAP_BYP_EN);
clrsetbits32(res2mmio(res, MMC_CAP_BYP_REG1, 0),
MMC_CAP_BYP_SDR104 | MMC_CAP_BYP_SDR50,
MMC_CAP_BYP_DDR50);
}
void variant_mainboard_final(void)
{
struct device *dev;
/* Limit SD-Card speed to DDR50 mode to avoid SDR104/SDR50 modes due to
layout limitations. */
dev = pcidev_path_on_root(PCH_DEVFN_SDCARD);
if (dev) {
uint32_t reg;
uint16_t reg16;
struct resource *res = probe_resource(dev, PCI_BASE_ADDRESS_0);
if (!res)
return;
write32(res2mmio(res, SD_CAP_BYP, 0), SD_CAP_BYP_EN);
reg = read32(res2mmio(res, SD_CAP_BYP_REG1, 0));
/* Disable SDR104 and SDR50 mode while keeping DDR50 mode enabled. */
reg &= ~(SD_CAP_BYP_SDR104 | SD_CAP_BYP_SDR50);
reg |= SD_CAP_BYP_DDR50;
write32(res2mmio(res, SD_CAP_BYP_REG1, 0), reg);
disable_sdr_modes(res);
/* Use preset driver strength from preset value registers. */
reg16 = read16(res2mmio(res, HOSTCTRL2, 0));
reg16 |= HOSTCTRL2_PRESET;
write16(res2mmio(res, HOSTCTRL2, 0), reg16);
clrsetbits16(res2mmio(res, HOSTCTRL2, 0), 0, HOSTCTRL2_PRESET);
}
}

29
src/mainboard/siemens/mc_ehl/variants/mc_ehl4/mainboard.c
View file

@ -9,28 +9,33 @@
#define HOSTCTRL2 0x3E
#define HOSTCTRL2_PRESET (1 << 15)
#define SD_CAP_BYP 0x810
#define SD_CAP_BYP_EN 0x5A
#define SD_CAP_BYP_REG1 0x814
#define SD_CAP_BYP_SDR50 (1 << 13)
#define SD_CAP_BYP_SDR104 (1 << 14)
#define SD_CAP_BYP_DDR50 (1 << 15)
#define MMC_CAP_BYP 0x810
#define MMC_CAP_BYP_EN 0x5A
#define MMC_CAP_BYP_REG1 0x814
#define MMC_CAP_BYP_SDR50 (1 << 13)
#define MMC_CAP_BYP_SDR104 (1 << 14)
#define MMC_CAP_BYP_DDR50 (1 << 15)
/* Disable SDR104 and SDR50 mode while keeping DDR50 mode enabled. */
static void disable_sdr_modes(struct resource *res)
{
write32(res2mmio(res, MMC_CAP_BYP, 0), MMC_CAP_BYP_EN);
clrsetbits32(res2mmio(res, MMC_CAP_BYP_REG1, 0),
MMC_CAP_BYP_SDR104 | MMC_CAP_BYP_SDR50,
MMC_CAP_BYP_DDR50);
}
void variant_mainboard_final(void)
{
struct device *dev;
/* Limit SD card speed to DDR50 mode to avoid SDR104/SDR50 modes due to
layout limitations. */
dev = pcidev_path_on_root(PCH_DEVFN_SDCARD);
if (dev) {
struct resource *res = probe_resource(dev, PCI_BASE_ADDRESS_0);
if (!res)
return;
write32(res2mmio(res, SD_CAP_BYP, 0), SD_CAP_BYP_EN);
clrsetbits32(res2mmio(res, SD_CAP_BYP_REG1, 0),
SD_CAP_BYP_SDR104 | SD_CAP_BYP_SDR50,
SD_CAP_BYP_DDR50);
disable_sdr_modes(res);
/* Use preset driver strength from preset value registers. */
clrsetbits16(res2mmio(res, HOSTCTRL2, 0), 0, HOSTCTRL2_PRESET);