soc/qualcomm/x1p42100: Add support for Hamoa SoC

Introduce a new `SOC_QUALCOMM_HAMOA` Kconfig option and refactor the
Qualcomm SoC build to support Hamoa.

This change prepares the groundwork for Hamoa-based mainboards by:

- Creating a common base: A new `SOC_QUALCOMM_BASE` Kconfig option
  is introduced to group configurations shared between Qualcomm SoCs.
- Separating SoC-specific blobs: The build process now dynamically
  selects the correct device tree blob (DTB) and display control blob
  (DCB) files for Hamoa via a new `DTB_DCB_BLOB_PATH` variable in the
  `Makefile.mk`.
- Enabling future mainboards: This allows mainboards built on the Hamoa
  SoC to be configured and built within the existing Qualcomm SoC
  directory.

BUG=b:437662790
TEST=Able to build and boot google/quenbi.

Change-Id: Ife983495b757fbf06ad96f0ca15fd89bf41c77c0
Signed-off-by: Subrata Banik <subratabanik@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/88737
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Subrata Banik 2025-08-10 15:32:06 +05:30
commit 2e61995b2f
2 changed files with 26 additions and 6 deletions

View file

@ -1,6 +1,6 @@
## SPDX-License-Identifier: GPL-2.0-only
config SOC_QUALCOMM_X1P42100
config SOC_QUALCOMM_BASE
bool
default n
select ARCH_BOOTBLOCK_ARMV8_64
@ -29,7 +29,21 @@ config SOC_QUALCOMM_X1P42100
select SDHCI_CONTROLLER
select SOC_QUALCOMM_COMMON
if SOC_QUALCOMM_X1P42100
config SOC_QUALCOMM_X1P42100
bool
select SOC_QUALCOMM_BASE
default n
help
Choose this option if the mainboard is built using Qualcomm X1P42100 system-on-a-chip SoC.
config SOC_QUALCOMM_HAMOA
bool
select SOC_QUALCOMM_BASE
default n
help
Choose this option if the mainboard is built using Qualcomm Hamoa system-on-a-chip SoC.
if SOC_QUALCOMM_BASE
config QC_BLOBS_UPSTREAM
bool "QC blobs are available in upstream repository"

View file

@ -1,5 +1,5 @@
## SPDX-License-Identifier: GPL-2.0-only
ifeq ($(CONFIG_SOC_QUALCOMM_X1P42100),y)
ifeq ($(CONFIG_SOC_QUALCOMM_BASE),y)
decompressor-y += decompressor.c
decompressor-y += mmu.c
@ -57,6 +57,12 @@ ifeq ($(CONFIG_USE_QC_BLOBS),y)
# TODO: Upload X1P42100 SoC blobs
X1P42100_BLOB := $(top)/3rdparty/qc_blobs/x1p42100
ifeq ($(CONFIG_SOC_QUALCOMM_HAMOA),y)
DTB_DCB_BLOB_PATH := hamoa
else
DTB_DCB_BLOB_PATH := x1p42100
endif
ifeq ($(CONFIG_QC_SDI_ENABLE),y)
BL31_MAKEARGS += QTI_SDI_BUILD=1
BL31_MAKEARGS += QTISECLIB_PATH=$(X1P42100_BLOB)/qtiseclib/libqtisec_dbg.a
@ -98,7 +104,7 @@ $(QCLIB_CBFS)-compression := $(CBFS_PRERAM_COMPRESS_FLAG)
cbfs-files-y += $(QCLIB_CBFS)
################################################################################
DCB_FILE := $(X1P42100_BLOB)/boot/dcb.bin
DCB_FILE := $(X1P42100_BLOB)/boot/$(DTB_DCB_BLOB_PATH)/dcb.bin
DCB_CBFS := $(CONFIG_CBFS_PREFIX)/dcb
$(DCB_CBFS)-file := $(DCB_FILE)
$(DCB_CBFS)-type := raw
@ -106,7 +112,7 @@ $(DCB_CBFS)-compression := $(CBFS_COMPRESS_FLAG)
cbfs-files-y += $(DCB_CBFS)
################################################################################
DTB_FILE := $(X1P42100_BLOB)/boot/pre-ddr.dtb
DTB_FILE := $(X1P42100_BLOB)/boot/$(DTB_DCB_BLOB_PATH)/pre-ddr.dtb
DTB_CBFS := $(CONFIG_CBFS_PREFIX)/dtb
$(DTB_CBFS)-file := $(DTB_FILE)
$(DTB_CBFS)-type := raw
@ -215,4 +221,4 @@ cbfs-files-y += $(GSI_FW_CBFS)
endif # ifeq ($(CONFIG_USE_QC_BLOBS),y)
endif # ifeq ($(CONFIG_QC_BLOBS_UPSTREAM),y)
endif # ifeq ($(CONFIG_SOC_QUALCOMM_X1P42100),y)
endif # ifeq ($(CONFIG_SOC_QUALCOMM_BASE),y)