From 2c8d157ea4e07cce93e72b707e5659be701e75f3 Mon Sep 17 00:00:00 2001 From: Subrata Banik Date: Fri, 1 Aug 2025 15:38:58 +0530 Subject: [PATCH] {drivers, soc/qualcomm/common}: Add configurable delay for UART bitbang MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This commit introduces a new Kconfig option, UART_BITBANG_TX_DELAY_MS, to make the UART TX pin stabilization delay configurable. A default 5ms (CONFIG_UART_BITBANG_TX_DELAY_MS) delay is added in uart_init() after the TX pin is set high. This addresses an issue where the initial character sent by the UART could be corrupted due to the pin not being stable. The delay ensures the line state is properly established before data transmission begins. This was found to resolve early boot console corruption on some boards. The issue is likely a race condition where the first character starts transmitting before the GPIO output is fully stabilized. TEST=Able to build and boot google/zombie w/o any junk characters in AP firmware log. w/o this patch: ``` �ɍ���щ�����х�ѥ��b����ٕ��Jrrrjjm UuI5�ፕ�ѥ���������ͥ��х�����jm UuI5���ѥ���ፕ�ѥ��m��jm UuI5����ѕ�ѕፕ�ѥ��m��[DEBUG] NCC Frequency bumped to 1.363(GHz) ``` w/ this patch: ``` [NOTE ] coreboot-25.06-78-gfe786406960e-dirty Fri Aug 01 17:12:22 UTC 2025 aarch64 bootblock starting (log level: 8)... [DEBUG] ARM64: Exception handlers installed. [DEBUG] ARM64: Testing exception [DEBUG] ARM64: Done test exception [DEBUG] Silver Frequency bumped to 1.5168(GHz) [DEBUG] L3 Frequency bumped to 1.1904(GHz) ``` Change-Id: I33c9ea65aa42d23acf3b89f977d4985569c144e8 Signed-off-by: Subrata Banik Reviewed-on: https://review.coreboot.org/c/coreboot/+/88633 Reviewed-by: Kapil Porwal Tested-by: build bot (Jenkins) --- src/drivers/uart/Kconfig | 8 ++++++++ src/soc/qualcomm/common/uart_bitbang.c | 3 +++ 2 files changed, 11 insertions(+) diff --git a/src/drivers/uart/Kconfig b/src/drivers/uart/Kconfig index dcdd5bc170..f323d14be4 100644 --- a/src/drivers/uart/Kconfig +++ b/src/drivers/uart/Kconfig @@ -35,6 +35,14 @@ config UART_OVERRIDE_REFCLK Set to "y" when the platform overrides the uart_platform_refclk routine. +config UART_BITBANG_TX_DELAY_MS + int + default 5 + help + This option sets a delay in milliseconds after configuring the + UART TX pin. This can help stabilize the line and prevent + corruption of the first character transmitted. + config DRIVERS_UART_8250MEM bool default n diff --git a/src/soc/qualcomm/common/uart_bitbang.c b/src/soc/qualcomm/common/uart_bitbang.c index d6447f1f18..448b00c055 100644 --- a/src/soc/qualcomm/common/uart_bitbang.c +++ b/src/soc/qualcomm/common/uart_bitbang.c @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include +#include #include #include #include @@ -18,6 +19,8 @@ static void set_tx(int line_state) void uart_init(unsigned int idx) { gpio_output(UART_TX_PIN, 1); + + mdelay(CONFIG_UART_BITBANG_TX_DELAY_MS); } void uart_tx_byte(unsigned int idx, unsigned char data)