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veyron: The ODT function is disabled LPDDR3

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We found that we should better keep ODT off for LPDDR3 on our boards.

BRANCH=veyron
BUG=chrome-os-partner:37346
TEST=Boot veyron_speedy normal

Change-Id: Iebb8e74706756508dd56b85ad87baad48893c619
Signed-off-by: jinkun.hong <jinkun.hong@rock-chips.com>
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/255381
(cherry picked from commit 0d85725a6faedb5bdbe8731991c225c31f138599)
jwerner: Removed Danger and Rialto, added Jaq, Gus and Minnie
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/255977
This commit is contained in:
jinkun.hong 2015-03-03 14:20:58 +08:00 • committed by ChromeOS Commit Bot
commit 2c6cba8d44
14 changed files with 14 additions and 14 deletions
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2
src/mainboard/google/veyron_brain/sdram_inf/sdram-lpddr3-samsung-2GB.inc
View file

@ -74,5 +74,5 @@
.dramtype = LPDDR3,
.num_channels = 2,
.stride = 9,
.odt = 1
.odt = 0,
},

2
src/mainboard/google/veyron_gus/sdram_inf/sdram-lpddr3-samsung-2GB.inc
View file

@ -74,5 +74,5 @@
.dramtype = LPDDR3,
.num_channels = 2,
.stride = 9,
.odt = 1
.odt = 0,
},

2
src/mainboard/google/veyron_jaq/sdram_inf/sdram-lpddr3-samsung-2GB.inc
View file

@ -74,5 +74,5 @@
.dramtype = LPDDR3,
.num_channels = 2,
.stride = 9,
.odt = 1
.odt = 0,
},

2
src/mainboard/google/veyron_jerry/sdram_inf/sdram-lpddr3-samsung-2GB.inc
View file

@ -74,5 +74,5 @@
.dramtype = LPDDR3,
.num_channels = 2,
.stride = 9,
.odt = 1
.odt = 0,
},

2
src/mainboard/google/veyron_mighty/sdram_inf/sdram-lpddr3-samsung-2GB.inc
View file

@ -74,5 +74,5 @@
.dramtype = LPDDR3,
.num_channels = 2,
.stride = 9,
.odt = 1
.odt = 0,
},

2
src/mainboard/google/veyron_minnie/sdram_inf/sdram-lpddr3-hynix-2GB.inc
View file

@ -74,5 +74,5 @@
.dramtype = LPDDR3,
.num_channels = 2,
.stride = 9,
.odt = 1
.odt = 0,
},

2
src/mainboard/google/veyron_minnie/sdram_inf/sdram-lpddr3-hynix-4GB.inc
View file

@ -73,5 +73,5 @@
.dramtype = LPDDR3,
.num_channels = 2,
.stride = 13,
.odt = 1
.odt = 0,
},

2
src/mainboard/google/veyron_minnie/sdram_inf/sdram-lpddr3-samsung-2GB.inc
View file

@ -74,5 +74,5 @@
.dramtype = LPDDR3,
.num_channels = 2,
.stride = 9,
.odt = 1
.odt = 0,
},

2
src/mainboard/google/veyron_minnie/sdram_inf/sdram-lpddr3-samsung-4GB.inc
View file

@ -73,5 +73,5 @@
.dramtype = LPDDR3,
.num_channels = 2,
.stride = 13,
.odt = 1
.odt = 0,
},

2
src/mainboard/google/veyron_pinky/sdram_inf/sdram-lpddr3-samsung-2GB.inc
View file

@ -74,5 +74,5 @@
.dramtype = LPDDR3,
.num_channels = 2,
.stride = 9,
.odt = 1
.odt = 0,
},

2
src/mainboard/google/veyron_speedy/sdram_inf/sdram-lpddr3-hynix-2GB.inc
View file

@ -74,5 +74,5 @@
.dramtype = LPDDR3,
.num_channels = 2,
.stride = 9,
.odt = 1
.odt = 0,
},

2
src/mainboard/google/veyron_speedy/sdram_inf/sdram-lpddr3-hynix-4GB.inc
View file

@ -73,5 +73,5 @@
.dramtype = LPDDR3,
.num_channels = 2,
.stride = 13,
.odt = 1
.odt = 0,
},

2
src/mainboard/google/veyron_speedy/sdram_inf/sdram-lpddr3-samsung-2GB.inc
View file

@ -74,5 +74,5 @@
.dramtype = LPDDR3,
.num_channels = 2,
.stride = 9,
.odt = 1
.odt = 0,
},

2
src/mainboard/google/veyron_speedy/sdram_inf/sdram-lpddr3-samsung-4GB.inc
View file

@ -73,5 +73,5 @@
.dramtype = LPDDR3,
.num_channels = 2,
.stride = 13,
.odt = 1
.odt = 0,
},