- Updates for the supermicro p4dc6 motherboard
- Code to initialize sdram from C on the l440gx - cache as ram code fro the p6 it works except conflict misses occur with addresses that are not cached so writing to ram does not work. Which makes it to brittle to count on. - Initial implementation of a fallback booting scheme where we can have two copies of linuxbios in rom at once. - Movement of 32 bit entry code from entry16.inc to entry32.inc - Update of all config files so they now also include entry32.inc - Fix for start_stop.c & entry16.inc so I can fairly arbitrarily relocate the 16bit entry code in SMP. - A small number of fixes for warnings
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97 changed files with 2517 additions and 291 deletions
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src/include/cpu/i786/multiplier.h
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src/include/cpu/i786/multiplier.h
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/*
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** NMI A20M IGNNE INTR
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* X8 H H H H
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* X9 H H H L projected
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* X10 H H L H
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* X11 H H L L
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* X12 H L H H
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* X13 H L H L
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* X14 H L L H
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* X15 H L L L
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* X16 L H H H
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* X17 L H H L
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* X18 L H L H
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* X19 L H L L
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* X20 L L H H
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* X21 L L H L projected
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* X22 L L L H projected
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* X23 L L L L projected
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*
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** NMI INTR IGNNE A20M
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* X8 H H H H
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* X9 H L H H projected
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* X10 H H L H
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* X11 H L L H
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* X12 H H H L
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* X13 H L H L
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* X14 H H L L
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* X15 H L L L
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* X16 L H H H
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* X17 L L H H
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* X18 L H L H
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* X19 L L L H
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* X20 L H H L
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* X21 L L H L projected
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* X22 L H L L projected
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* X23 L L L L projected
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*/
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#define XEON_X8 0xf
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#define XEON_X9 0xb /* projected */
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#define XEON_X10 0xd
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#define XEON_X11 0x9
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#define XEON_X12 0xe
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#define XEON_X13 0xa
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#define XEON_X14 0xc
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#define XEON_X15 0x8
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#define XEON_X16 0x7
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#define XEON_X17 0x3
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#define XEON_X18 0x5
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#define XEON_X19 0x1
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#define XEON_X20 0x6
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#define XEON_X21 0x2 /* projected */
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#define XEON_X22 0x4 /* projected */
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#define XEON_X23 0x0 /* projected */
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#if !defined(ASSEMBLY)
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void set_var_mtrr(unsigned int reg, unsigned long base, unsigned long size, unsigned char type);
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#if defined(INTEL_PPRO_MTRR)
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void setup_mtrrs(unsigned long ramsizeK);
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#endif
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