mb/google/brox: Hint romstage init about upcoming reset

Add support for the mainboard to check for any potential firmware
component update and hence the assosicated reset. This indication can be
used to avoid any redundant resets during the boot flow.

BUG=b:375444631
TEST=Build Brox BIOS image and boot to OS. Ensure that the hints are
provided correctly and 2 redundant resets are filtered out.

Change-Id: Ieed3f9013dee9aa501a3f0403f3a28722a3878f1
Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84937
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>

src/mainboard/google/brox/variants/baseboard/brox/Makefile.mk

@@ -4,6 +4,7 @@ bootblock-y += gpio.c
 
 romstage-y += memory.c
 romstage-y += gpio.c
+romstage-y += romstage.c
 romstage-$(CONFIG_MAINBOARD_USE_EARLY_LIBGFXINIT) += gma-mainboard.ads
 
 ramstage-y += gpio.c

src/mainboard/google/brox/variants/baseboard/brox/romstage.c

@@ -0,0 +1,65 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+#include <baseboard/variants.h>
+#include <cbfs.h>
+#include <ec/google/chromeec/ec.h>
+#include <security/vboot/vboot_common.h>
+#include <security/vboot/misc.h>
+#include <soc/romstage.h>
+
+#define FWVER_SIZE 3
+#define FWVER_TO_INT(MAJOR, MINOR, PATCH)                                                  \
+	((uint32_t)(((MAJOR) & 0xFF) << 16 | ((MINOR) & 0xFF) << 8 | ((PATCH) & 0xFF)))
+
+static bool check_auxfw_ver_mismatch(void)
+{
+	uint8_t *new_ver;
+	size_t new_ver_size;
+	struct ec_response_pd_chip_info pd_chip_r = {0};
+	const char *fwver_fname = variant_get_auxfw_version_file();
+	uint8_t cur_major_ver;
+	bool mismatch = false, is_productionfw;
+	int ret;
+
+	ret = google_chromeec_get_pd_chip_info(0, 0, &pd_chip_r);
+	if (ret < 0) {
+		printk(BIOS_INFO, "%s: Cannot get PD port info\n", __func__);
+		return mismatch;
+	}
+	cur_major_ver = (pd_chip_r.fw_version_number >> 16) & 0xFF;
+	is_productionfw = !!(cur_major_ver & 0xF0);
+
+	/* find bundled fw hash */
+	new_ver = cbfs_map(fwver_fname, &new_ver_size);
+	if (new_ver == NULL || new_ver_size != FWVER_SIZE)
+		return mismatch;
+
+	/*
+	 * Firmware version mismatches and satisfies anti-rollback conditions.
+	 * Anti-rollback conditions are one of the following:
+	 * 1) Not a production firmware.
+	 * 2) New major version is greater than current major version.
+	 */
+	if ((pd_chip_r.fw_version_number !=
+	     FWVER_TO_INT(new_ver[0], new_ver[1], new_ver[2])) &&
+	    (!is_productionfw || new_ver[0] >= cur_major_ver)) {
+		printk(BIOS_INFO, "%s: Expecting Aux FW update and hence a reset\n", __func__);
+		mismatch = true;
+	}
+
+	cbfs_unmap(new_ver);
+	return mismatch;
+}
+
+bool mainboard_expects_another_reset(void)
+{
+	if (vboot_recovery_mode_enabled())
+		return false;
+
+	if (!CONFIG(VBOOT) ||
+	    (vboot_is_gbb_flag_set(VB2_GBB_FLAG_DISABLE_EC_SOFTWARE_SYNC) &&
+	    vboot_is_gbb_flag_set(VB2_GBB_FLAG_DISABLE_AUXFW_SOFTWARE_SYNC)))
+		return false;
+
+	return check_auxfw_ver_mismatch();
+}

src/mainboard/google/brox/variants/baseboard/include/baseboard/variants.h

@@ -60,4 +60,5 @@ void variant_update_power_limits(const struct cpu_power_limits *limits,
 void variant_init(void);
 void variant_finalize(void);
 
+const char *variant_get_auxfw_version_file(void);
 #endif /*__BASEBOARD_VARIANTS_H__ */

src/mainboard/google/brox/variants/brox/Makefile.mk

@@ -2,6 +2,7 @@
 
 bootblock-y += gpio.c
 romstage-y += gpio.c
+romstage-$(CONFIG_FW_CONFIG) += variant.c
 ramstage-$(CONFIG_FW_CONFIG) += fw_config.c
 ramstage-$(CONFIG_FW_CONFIG) += variant.c
 ramstage-y += gpio.c

src/mainboard/google/brox/variants/brox/variant.c

@@ -25,3 +25,12 @@ const char *get_wifi_sar_cbfs_filename(void)
 {
 	return get_wifi_sar_fw_config_filename(FW_CONFIG_FIELD(WIFI_BT));
 }
+
+const char *variant_get_auxfw_version_file(void)
+{
+	if (fw_config_probe(FW_CONFIG(RETIMER, RETIMER_BYPASS)))
+		return "rts5453_retimer_bypass.hash";
+	else if (fw_config_probe(FW_CONFIG(RETIMER, RETIMER_JHL8040)))
+		return "rts5453_retimer_jhl8040.hash";
+	return NULL;
+}

src/mainboard/google/brox/variants/jubilant/Makefile.mk

@@ -4,6 +4,7 @@ bootblock-y += gpio.c
 
 romstage-y += gpio.c
 romstage-y += memory.c
+romstage-$(CONFIG_FW_CONFIG) += variant.c
 
 ramstage-$(CONFIG_FW_CONFIG) += fw_config.c
 ramstage-$(CONFIG_FW_CONFIG) += variant.c

src/mainboard/google/brox/variants/jubilant/variant.c

@@ -31,6 +31,11 @@ const char *get_wifi_sar_cbfs_filename(void)
 	return get_wifi_sar_fw_config_filename(FW_CONFIG_FIELD(WIFI_BT));
 }
 
+const char *variant_get_auxfw_version_file(void)
+{
+	return "rts5453_retimer_bypass.hash";
+}
+
 static void wwan_out_of_reset(void *unused)
 {
 	if (fw_config_probe(FW_CONFIG(DB_USB, DB_1A_LTE))) {

src/mainboard/google/brox/variants/lotso/Makefile.mk

@@ -4,6 +4,7 @@ bootblock-y += gpio.c
 romstage-y += memory.c
 romstage-y += gpio.c
 ramstage-y += gpio.c
+romstage-$(CONFIG_FW_CONFIG) += variant.c
 ramstage-$(CONFIG_FW_CONFIG) += variant.c
 ramstage-y += ramstage.c
 smm-y += smihandler.c

src/mainboard/google/brox/variants/lotso/variant.c

@@ -19,3 +19,12 @@ const char *get_wifi_sar_cbfs_filename(void)
 {
 	return get_wifi_sar_fw_config_filename(FW_CONFIG_FIELD(WIFI_BT));
 }
+
+const char *variant_get_auxfw_version_file(void)
+{
+	if (fw_config_probe(FW_CONFIG(RETIMER, RETIMER_BYPASS)))
+		return "rts5453_retimer_bypass.hash";
+	else if (fw_config_probe(FW_CONFIG(RETIMER, RETIMER_JHL8040)))
+		return "rts5453_retimer_jhl8040.hash";
+	return NULL;
+}