mb/hp/pro_3500_series: Move usb configuration

Since commit 943b540914 USB configurations are read from the
southbridge devicetree

This change only moves the USB configuration from early_init.c to
the devicetree

Change-Id: I69f1f800e4e2de5367795400d619bf9c000ff184
Signed-off-by: Vesek <venda.straka@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/85831
Reviewed-by: Keith Hui <buurin@gmail.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Vesek 2025-01-02 17:06:56 +01:00 committed by Matt DeVillier
commit 2b46c3ddb1
2 changed files with 16 additions and 17 deletions

View file

@ -22,6 +22,22 @@ chip northbridge/intel/sandybridge
register "sata_port_map" = "0x33"
register "spi_lvscc" = "0x2005"
register "spi_uvscc" = "0x2005"
register "usb_port_config" = "{
{ 1, 6, 0 },
{ 1, 6, 0 },
{ 1, 6, 1 },
{ 1, 9, 1 },
{ 1, 10, 2 },
{ 1, 11, 2 },
{ 1, 6, 3 },
{ 1, 6, 3 },
{ 1, 6, 4 },
{ 1, 12, 4 },
{ 1, 6, 6 },
{ 1, 11, 5 },
{ 1, 6, 5 },
{ 1, 6, 6 },
}"
device ref ehci2 on end
device ref hda on end
device ref pcie_rp2 on end # MINI_PCIE

View file

@ -8,23 +8,6 @@
#include "common_defines.h"
#include "led.h"
const struct southbridge_usb_port mainboard_usb_ports[] = {
{ 1, 6, 0 },
{ 1, 6, 0 },
{ 1, 6, 1 },
{ 1, 9, 1 },
{ 1, 10, 2 },
{ 1, 11, 2 },
{ 1, 6, 3 },
{ 1, 6, 3 },
{ 1, 6, 4 },
{ 1, 12, 4 },
{ 1, 6, 6 },
{ 1, 11, 5 },
{ 1, 6, 5 },
{ 1, 6, 6 },
};
void bootblock_mainboard_early_init(void)
{
pci_write_config16(PCH_LPC_DEV, LPC_EN, CNF1_LPC_EN | KBC_LPC_EN);