erebion/coreboot
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity Actions

soc/intel/common: Create common Intel FSP reset code block

Browse source 
Create SOC_INTEL_COMMON_FSP_RESET Kconfig to have IA common code block
to handle platform reset request raised by FSP. The FSP will use the
FSP EAS v2.0 section 12.2.2 (OEM Status Code) to indicate that a reset
is required.

Make FSP_STATUS_GLOBAL_RESET depends on SOC_INTEL_COMMON_FSP_RESET.

Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Change-Id: I934b41affed7bb146f53ff6a4654fdbc6626101b
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47017
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This commit is contained in:
Subrata Banik 2020-10-31 21:07:16 +05:30 • committed by Patrick Georgi
commit 2b2ade9638
3 changed files with 27 additions and 0 deletions
Download patch file Download diff file Expand all files Collapse all files

3
src/soc/intel/common/Makefile.inc
View file

@ -27,6 +27,9 @@ romstage-$(CONFIG_TPM_CR50) += tpm_tis.c
ramstage-$(CONFIG_TPM_CR50) += tpm_tis.c
postcar-$(CONFIG_TPM_CR50) += tpm_tis.c
romstage-$(CONFIG_SOC_INTEL_COMMON_FSP_RESET) += fsp_reset.c
ramstage-$(CONFIG_SOC_INTEL_COMMON_FSP_RESET) += fsp_reset.c
ifeq ($(CONFIG_MMA),y)
MMA_BLOBS_PATH = $(call strip_quotes,$(CONFIG_MMA_BLOBS_PATH))
MMA_TEST_NAMES = $(notdir $(wildcard $(MMA_BLOBS_PATH)/tests/*))

16
src/soc/intel/common/fsp_reset.c Normal file
View file

@ -0,0 +1,16 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <console/console.h>
#include <fsp/util.h>
#include <soc/intel/common/reset.h>
void chipset_handle_reset(uint32_t status)
{
if (status == CONFIG_FSP_STATUS_GLOBAL_RESET) {
printk(BIOS_DEBUG, "GLOBAL RESET!\n");
global_reset();
}
printk(BIOS_ERR, "unhandled reset type %x\n", status);
die("unknown reset type");
}