commonlib/coreboot_tables.h: Fix lb_smmstorev2 alignment

We have a hard alignment to LB_ENTRY_ALIGN (4). We check for an
alignment of 4 bytes at the beginning of each lb_record. But since it
was 8 byte aligned, it was also automatically 4 byte aligned.
It therefore wasn't detected by coreboot.

This will break payload implementations that rely on the 8 byte
alignment for this specific struct. But since lb_smmstorev2 has only
been recently updated in commit 5bf88a44e9 ("drivers/smmstore:
Support 64-bit MMIO addresses"), one can only hope that no payloads
were updated to this yet.

Signed-off-by: Maximilian Brune <maximilian.brune@9elements.com>
Change-Id: Ib6171b7d4bd08b8a1559833ddb048644ff082b73
Reviewed-on: https://review.coreboot.org/c/coreboot/+/89902
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>

src/commonlib/include/commonlib/coreboot_tables.h

@@ -555,7 +555,7 @@ struct lb_smmstorev2 {
 	uint32_t com_buffer_size;	/* Size of the communication buffer in bytes */
 	uint8_t apm_cmd;		/* The command byte to write to the APM I/O port */
 	uint8_t unused[3];		/* Set to zero */
-	uint64_t mmap_addr;		/* 64-bit MMIO address of the store for read only access.
+	lb_uint64_t mmap_addr;		/* 64-bit MMIO address of the store for read only access.
 					   Introduced after the initial implementation. Users of
 					   this table must check the 'size' field to detect if its
 					   written out by coreboot. */