soc/mediatek/mt8196: Initialize watchdog

Add watchdog support for MT8196.

TEST=build pass and WDT uart log
BUG=b:317009620

Change-Id: I9d5e71aa27d469855c2bd65abc5309d69a018750
Signed-off-by: Jarried Lin <jarried.lin@mediatek.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83926
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yidi Lin <yidilin@google.com>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>

src/soc/mediatek/mt8196/Makefile.mk

@@ -10,6 +10,7 @@ all-y += ../common/uart.c
 
 bootblock-y += bootblock.c
 bootblock-y += ../common/mmu_operations.c
+bootblock-y += ../common/wdt.c ../common/wdt_req.c wdt.c
 
 romstage-y += ../common/cbmem.c
 romstage-y += emi.c

src/soc/mediatek/mt8196/bootblock.c

@@ -2,8 +2,10 @@
 
 #include <bootblock_common.h>
 #include <soc/mmu_operations.h>
+#include <soc/wdt.h>
 
 void bootblock_soc_init(void)
 {
 	mtk_mmu_init();
+	mtk_wdt_init();
 }

src/soc/mediatek/mt8196/include/soc/wdt.h

@@ -0,0 +1,14 @@
+/* SPDX-License-Identifier: GPL-2.0-only OR MIT */
+
+#ifndef SOC_MEDIATEK_MT8196_WDT_H
+#define SOC_MEDIATEK_MT8196_WDT_H
+
+#include <soc/wdt_common.h>
+
+#define MTK_WDT_SPM_THERMAL_VAL 1
+
+DEFINE_BIT(MTK_WDT_SPM_THERMAL_EN, 0)
+DEFINE_BIT(MTK_WDT_THERMAL_EN, 18)
+DEFINE_BIT(MTK_WDT_THERMAL_IRQ, 18)
+
+#endif /* SOC_MEDIATEK_MT8196_WDT_H */

src/soc/mediatek/mt8196/wdt.c

@@ -0,0 +1,17 @@
+/* SPDX-License-Identifier: GPL-2.0-only OR MIT */
+
+/*
+ * This file is created based on MT8196 Functional Specification
+ * Chapter number: 7.3.4.4
+ */
+
+#include <device/mmio.h>
+#include <soc/addressmap.h>
+#include <soc/wdt.h>
+
+#define MTK_WDT_CLR_STATUS 0x230001FF
+
+void mtk_wdt_clr_status(void)
+{
+	write32(&mtk_wdt->wdt_mode, MTK_WDT_CLR_STATUS);
+}