diff --git a/src/mainboard/google/nyan/Makefile.inc b/src/mainboard/google/nyan/Makefile.inc index 8d905c26b2..786d4eb174 100644 --- a/src/mainboard/google/nyan/Makefile.inc +++ b/src/mainboard/google/nyan/Makefile.inc @@ -36,5 +36,6 @@ romstage-y += reset.c romstage-y += romstage.c romstage-y += sdram_configs.c +ramstage-y += reset.c ramstage-y += boardid.c ramstage-y += mainboard.c diff --git a/src/mainboard/google/nyan/pmic.c b/src/mainboard/google/nyan/pmic.c index 43c0e91652..207564ddc3 100644 --- a/src/mainboard/google/nyan/pmic.c +++ b/src/mainboard/google/nyan/pmic.c @@ -26,7 +26,7 @@ #include #include "pmic.h" -#include "reset.h" +#include enum { AS3722_I2C_ADDR = 0x40 @@ -65,7 +65,7 @@ static void pmic_write_reg(unsigned bus, uint8_t reg, uint8_t val, int delay) printk(BIOS_ERR, "%s: reg = 0x%02X, value = 0x%02X failed!\n", __func__, reg, val); /* Reset the SoC on any PMIC write error */ - cpu_reset(); + hard_reset(); } else { if (delay) udelay(500); diff --git a/src/mainboard/google/nyan/reset.c b/src/mainboard/google/nyan/reset.c index 7f1fff922a..05cca2777e 100644 --- a/src/mainboard/google/nyan/reset.c +++ b/src/mainboard/google/nyan/reset.c @@ -19,10 +19,9 @@ #include #include +#include -#include "reset.h" - -void cpu_reset(void) +void hard_reset(void) { gpio_output(GPIO(I5), 0); while(1); diff --git a/src/mainboard/google/nyan/reset.h b/src/mainboard/google/nyan/reset.h deleted file mode 100644 index debe83818b..0000000000 --- a/src/mainboard/google/nyan/reset.h +++ /dev/null @@ -1,25 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright 2014 Google Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#ifndef __MAINBOARD_GOOGLE_NYAN_BOOTBLOCK_H__ -#define __MAINBOARD_GOOGLE_NYAN_BOOTBLOCK_H__ - -void cpu_reset(void); - -#endif /* __MAINBOARD_GOOGLE_NYAN_BOOTBLOCK_H__ */ diff --git a/src/mainboard/google/nyan/romstage.c b/src/mainboard/google/nyan/romstage.c index c694fab0e1..a24da3f93a 100644 --- a/src/mainboard/google/nyan/romstage.c +++ b/src/mainboard/google/nyan/romstage.c @@ -26,7 +26,7 @@ #include #include #include -#include +#include #include #include #include "sdram_configs.h" @@ -188,7 +188,7 @@ static void __attribute__((noinline)) romstage(void) */ if (power_reset_status() == POWER_RESET_WATCHDOG) { printk(BIOS_INFO, "Watchdog reset detected, rebooting.\n"); - cpu_reset(); + hard_reset(); } cbmem_initialize_empty(); diff --git a/src/mainboard/google/nyan_big/Makefile.inc b/src/mainboard/google/nyan_big/Makefile.inc index 9faba250d4..03c38e3b56 100644 --- a/src/mainboard/google/nyan_big/Makefile.inc +++ b/src/mainboard/google/nyan_big/Makefile.inc @@ -35,5 +35,6 @@ romstage-y += reset.c romstage-y += romstage.c romstage-y += sdram_configs.c +ramstage-y += reset.c ramstage-y += boardid.c ramstage-y += mainboard.c diff --git a/src/mainboard/google/nyan_big/pmic.c b/src/mainboard/google/nyan_big/pmic.c index 19f4708b38..50e8b25871 100644 --- a/src/mainboard/google/nyan_big/pmic.c +++ b/src/mainboard/google/nyan_big/pmic.c @@ -26,7 +26,7 @@ #include #include "pmic.h" -#include "reset.h" +#include enum { AS3722_I2C_ADDR = 0x40 @@ -65,7 +65,7 @@ static void pmic_write_reg(unsigned bus, uint8_t reg, uint8_t val, int delay) printk(BIOS_ERR, "%s: reg = 0x%02X, value = 0x%02X failed!\n", __func__, reg, val); /* Reset the SoC on any PMIC write error */ - cpu_reset(); + hard_reset(); } else { if (delay) udelay(500); diff --git a/src/mainboard/google/nyan_big/reset.c b/src/mainboard/google/nyan_big/reset.c index 7f1fff922a..05cca2777e 100644 --- a/src/mainboard/google/nyan_big/reset.c +++ b/src/mainboard/google/nyan_big/reset.c @@ -19,10 +19,9 @@ #include #include +#include -#include "reset.h" - -void cpu_reset(void) +void hard_reset(void) { gpio_output(GPIO(I5), 0); while(1); diff --git a/src/mainboard/google/nyan_big/reset.h b/src/mainboard/google/nyan_big/reset.h deleted file mode 100644 index debe83818b..0000000000 --- a/src/mainboard/google/nyan_big/reset.h +++ /dev/null @@ -1,25 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright 2014 Google Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#ifndef __MAINBOARD_GOOGLE_NYAN_BOOTBLOCK_H__ -#define __MAINBOARD_GOOGLE_NYAN_BOOTBLOCK_H__ - -void cpu_reset(void); - -#endif /* __MAINBOARD_GOOGLE_NYAN_BOOTBLOCK_H__ */ diff --git a/src/mainboard/google/nyan_big/romstage.c b/src/mainboard/google/nyan_big/romstage.c index c694fab0e1..a24da3f93a 100644 --- a/src/mainboard/google/nyan_big/romstage.c +++ b/src/mainboard/google/nyan_big/romstage.c @@ -26,7 +26,7 @@ #include #include #include -#include +#include #include #include #include "sdram_configs.h" @@ -188,7 +188,7 @@ static void __attribute__((noinline)) romstage(void) */ if (power_reset_status() == POWER_RESET_WATCHDOG) { printk(BIOS_INFO, "Watchdog reset detected, rebooting.\n"); - cpu_reset(); + hard_reset(); } cbmem_initialize_empty(); diff --git a/src/mainboard/google/nyan_blaze/Makefile.inc b/src/mainboard/google/nyan_blaze/Makefile.inc index e269fe48f3..3298b36031 100644 --- a/src/mainboard/google/nyan_blaze/Makefile.inc +++ b/src/mainboard/google/nyan_blaze/Makefile.inc @@ -38,5 +38,6 @@ romstage-y += reset.c romstage-y += romstage.c romstage-y += sdram_configs.c +ramstage-y += reset.c ramstage-y += boardid.c ramstage-y += mainboard.c diff --git a/src/mainboard/google/nyan_blaze/pmic.c b/src/mainboard/google/nyan_blaze/pmic.c index 19f4708b38..50e8b25871 100644 --- a/src/mainboard/google/nyan_blaze/pmic.c +++ b/src/mainboard/google/nyan_blaze/pmic.c @@ -26,7 +26,7 @@ #include #include "pmic.h" -#include "reset.h" +#include enum { AS3722_I2C_ADDR = 0x40 @@ -65,7 +65,7 @@ static void pmic_write_reg(unsigned bus, uint8_t reg, uint8_t val, int delay) printk(BIOS_ERR, "%s: reg = 0x%02X, value = 0x%02X failed!\n", __func__, reg, val); /* Reset the SoC on any PMIC write error */ - cpu_reset(); + hard_reset(); } else { if (delay) udelay(500); diff --git a/src/mainboard/google/nyan_blaze/reset.c b/src/mainboard/google/nyan_blaze/reset.c index 7f1fff922a..05cca2777e 100644 --- a/src/mainboard/google/nyan_blaze/reset.c +++ b/src/mainboard/google/nyan_blaze/reset.c @@ -19,10 +19,9 @@ #include #include +#include -#include "reset.h" - -void cpu_reset(void) +void hard_reset(void) { gpio_output(GPIO(I5), 0); while(1); diff --git a/src/mainboard/google/nyan_blaze/reset.h b/src/mainboard/google/nyan_blaze/reset.h deleted file mode 100644 index debe83818b..0000000000 --- a/src/mainboard/google/nyan_blaze/reset.h +++ /dev/null @@ -1,25 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright 2014 Google Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#ifndef __MAINBOARD_GOOGLE_NYAN_BOOTBLOCK_H__ -#define __MAINBOARD_GOOGLE_NYAN_BOOTBLOCK_H__ - -void cpu_reset(void); - -#endif /* __MAINBOARD_GOOGLE_NYAN_BOOTBLOCK_H__ */ diff --git a/src/mainboard/google/nyan_blaze/romstage.c b/src/mainboard/google/nyan_blaze/romstage.c index f4460ef23a..f6b37f37b4 100644 --- a/src/mainboard/google/nyan_blaze/romstage.c +++ b/src/mainboard/google/nyan_blaze/romstage.c @@ -26,7 +26,7 @@ #include #include #include -#include +#include #include #include #include "sdram_configs.h" @@ -188,7 +188,7 @@ static void __attribute__((noinline)) romstage(void) */ if (power_reset_status() == POWER_RESET_WATCHDOG) { printk(BIOS_INFO, "Watchdog reset detected, rebooting.\n"); - cpu_reset(); + hard_reset(); } cbmem_initialize_empty(); diff --git a/src/soc/nvidia/tegra124/Kconfig b/src/soc/nvidia/tegra124/Kconfig index bedf420415..7d48d8b749 100644 --- a/src/soc/nvidia/tegra124/Kconfig +++ b/src/soc/nvidia/tegra124/Kconfig @@ -3,6 +3,7 @@ config SOC_NVIDIA_TEGRA124 default n select HAVE_UART_MEMORY_MAPPED select HAVE_UART_SPECIAL + select HAVE_HARD_RESET select BOOTBLOCK_CONSOLE select EARLY_CONSOLE select DYNAMIC_CBMEM diff --git a/src/vendorcode/google/chromeos/vboot_main.c b/src/vendorcode/google/chromeos/vboot_main.c index 252dfb1bf8..901ce5ba03 100644 --- a/src/vendorcode/google/chromeos/vboot_main.c +++ b/src/vendorcode/google/chromeos/vboot_main.c @@ -109,7 +109,7 @@ int vb2ex_read_resource(struct vb2_context *ctx, static void reboot(void) { - cpu_reset(); + hard_reset(); } static void recovery(void)