diff --git a/util/cbmem/cbmem.c b/util/cbmem/cbmem.c index f1cd38bbae..b72ebe761b 100644 --- a/util/cbmem/cbmem.c +++ b/util/cbmem/cbmem.c @@ -26,6 +26,7 @@ #include #include #include +#include #include #include #include @@ -81,12 +82,12 @@ static void *map_memory(u64 physical) { void *v; off_t p; - int page = getpagesize(); + u64 page = getpagesize(); /* Mapped memory must be aligned to page size */ p = physical & ~(page - 1); - debug("Mapping 1MB of physical memory at 0x%llx.\n", (unsigned long long) p); + debug("Mapping 1MB of physical memory at %p.\n", (void *)p); v = mmap(NULL, MAP_BYTES, PROT_READ, MAP_SHARED, fd, p); @@ -153,7 +154,7 @@ static int parse_cbtable(u64 address) int i, found = 0; void *buf; - debug("Looking for coreboot table at %" PRIu64 "\n", address); + debug("Looking for coreboot table at %" PRIx64 "\n", address); buf = map_memory(address); /* look at every 16 bytes within 4K of the base */ @@ -559,9 +560,6 @@ static void print_usage(const char *name) int main(int argc, char** argv) { - int j; - static const int possible_base_addresses[] = { 0, 0xf0000 }; - int print_defaults = 1; int print_console = 0; int print_coverage = 0; @@ -621,11 +619,36 @@ int main(int argc, char** argv) return 1; } +#ifdef __arm__ + int dt_fd; + uint32_t cbtable_base; + + dt_fd = open("/proc/device-tree/firmware/coreboot/coreboot-table", + O_RDONLY, 0); + if (dt_fd < 0) { + fprintf(stderr, "Failed to open device tree node: %s\n", + strerror(errno)); + return 1; + } + + if (read(dt_fd, &cbtable_base, 4) != 4) { + fprintf(stderr, "Failed to read device tree node: %s\n", + strerror(errno)); + return 1; + } + close(dt_fd); + + parse_cbtable(ntohl(cbtable_base)); +#else + int j; + static const int possible_base_addresses[] = { 0, 0xf0000 }; + /* Find and parse coreboot table */ for (j = 0; j < ARRAY_SIZE(possible_base_addresses); j++) { if (parse_cbtable(possible_base_addresses[j])) break; } +#endif if (print_console) dump_console();