erebion/coreboot
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity Actions

baytrail: reinitialize spi controller in SMM finalization

Browse source 
On the SMM APM_CNT_FINALIZE step re-initialize the SPI
controller so that it can still log events after the SPI
controller has been locked down.

BUG=chrome-os-partner:24624
BRANCH=baytrail
TEST=Built and booted. Events still logged after SPI controller
     has been locked down.

Change-Id: I41a3e12c0398303e74f95eb6df82d5bc4303898b
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/185630
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
This commit is contained in:
Aaron Durbin 2014-02-09 16:04:06 -06:00 • committed by chrome-internal-fetch
commit 28ffb1a9e7
1 changed files with 21 additions and 0 deletions
Download patch file Download diff file Expand all files Collapse all files

21
src/soc/intel/baytrail/smihandler.c
View file

@ -26,6 +26,7 @@
#include <cpu/x86/smm.h>
#include <device/pci_def.h>
#include <elog.h>
#include <spi-generic.h>
#include <baytrail/pci_devs.h>
#include <baytrail/pmc.h>
@ -232,6 +233,23 @@ static void southbridge_smi_gsmi(void)
*ret = gsmi_exec(sub_command, param);
}
#endif
static void finalize(void)
{
static int finalize_done;
if (finalize_done) {
printk(BIOS_DEBUG, "SMM already finalized.\n");
return;
}
finalize_done = 1;
#if CONFIG_SPI_FLASH_SMM
/* Re-init SPI driver to handle locked BAR */
spi_init();
#endif
}
static void southbridge_smi_apmc(void)
{
uint8_t reg8;
@ -282,6 +300,9 @@ static void southbridge_smi_apmc(void)
southbridge_smi_gsmi();
break;
#endif
case APM_CNT_FINALIZE:
finalize();
break;
}
mainboard_smi_apmc(reg8);