From 28f1c5ad8092a43683235217939c1457546cef65 Mon Sep 17 00:00:00 2001 From: Sean Rhodes Date: Wed, 2 Apr 2025 14:37:31 +0100 Subject: [PATCH] mb/starlabs/starlite_adl: Disconnect the SML 0 and 1 GPIOs These are not connected to anything, so configure them accordingly. Change-Id: Ia3a528faf74c23d0b78210b22c6e8d3f69de8184 Signed-off-by: Sean Rhodes Reviewed-on: https://review.coreboot.org/c/coreboot/+/87120 Tested-by: build bot (Jenkins) Reviewed-by: Matt DeVillier --- .../starlabs/starlite_adl/variants/mk_v/gpio.c | 12 ++++-------- 1 file changed, 4 insertions(+), 8 deletions(-) diff --git a/src/mainboard/starlabs/starlite_adl/variants/mk_v/gpio.c b/src/mainboard/starlabs/starlite_adl/variants/mk_v/gpio.c index 7bb2c7fbb7..75c1d43e76 100644 --- a/src/mainboard/starlabs/starlite_adl/variants/mk_v/gpio.c +++ b/src/mainboard/starlabs/starlite_adl/variants/mk_v/gpio.c @@ -140,14 +140,10 @@ const struct pad_config gpio_table[] = { PAD_NC(GPP_B24, NONE), PAD_NC(GPP_B25, NONE), - /* C3: SML 0 Clock */ - PAD_CFG_NF(GPP_C3, NONE, DEEP, NF1), - /* C4: SML 0 Data */ - PAD_CFG_NF(GPP_C4, NONE, DEEP, NF1), - /* C6: SML 1 Clock */ - PAD_CFG_NF(GPP_C6, NONE, DEEP, NF1), - /* C7: SML 1 Data */ - PAD_CFG_NF(GPP_C7, NONE, DEEP, NF1), + PAD_NC(GPP_C3, NONE), + PAD_NC(GPP_C4, NONE), + PAD_NC(GPP_C6, NONE), + PAD_NC(GPP_C7, NONE), PAD_NC(GPP_C8, NONE), PAD_NC(GPP_C9, NONE), PAD_NC(GPP_C10, NONE),