From 28c03b501eadc91fa7cceef95ffc42d188a11325 Mon Sep 17 00:00:00 2001 From: Patrick Rudolph Date: Tue, 26 Nov 2024 09:41:41 +0100 Subject: [PATCH] mb/ocp/tiogapass: Implement mainboard_dimm_slot_exists The board has 24 slots for DDR4 ECC RDIMMs and it has 2 CPU sockets, where each is connected to 12 DIMMs. Every socket supports up to 6 channels, thus every channel is connected to 2 DIMMs. Implement mainboard_dimm_slot_exists accordingly to advertise all slots as SMBIOS type 17. TEST: Found all installed DIMMs advertised through SMBIOS on ocp/tiogapass. Change-Id: I31cb4a89aa11258ac04eb69a0e9c86f258280484 Signed-off-by: Patrick Rudolph Reviewed-on: https://review.coreboot.org/c/coreboot/+/85318 Reviewed-by: Christian Walter Tested-by: build bot (Jenkins) --- src/mainboard/ocp/tiogapass/romstage.c | 21 +++++++++++++++++---- 1 file changed, 17 insertions(+), 4 deletions(-) diff --git a/src/mainboard/ocp/tiogapass/romstage.c b/src/mainboard/ocp/tiogapass/romstage.c index d3063c6fe7..283d5f1266 100644 --- a/src/mainboard/ocp/tiogapass/romstage.c +++ b/src/mainboard/ocp/tiogapass/romstage.c @@ -1,13 +1,14 @@ /* SPDX-License-Identifier: GPL-2.0-or-later */ -#include -#include #include #include +#include +#include +#include +#include +#include #include #include -#include -#include #include #include "ipmi.h" @@ -64,3 +65,15 @@ void mainboard_memory_init_params(FSPM_UPD *mupd) mupd->FspmConfig.GpioConfig.GpioTable = NULL; mupd->FspmConfig.GpioConfig.NumberOfEntries = 0; } + +bool mainboard_dimm_slot_exists(uint8_t socket, uint8_t channel, uint8_t dimm) +{ + if (socket >= CONFIG_MAX_SOCKET) + return false; + if (channel >= 6) + return false; + if (dimm >= 2) + return false; + + return true; +}