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soc/mediatek/mt8192: Clean up memlayout.ld

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The macros being removed are already defined in the soc/memlayout.h.
Remove the duplicated definitions and include the common header instead.

BUG=none
TEST=emerge-asurada coreboot

Change-Id: I38d9ca2310fbc60bb453b9731203ffb0251cb444
Signed-off-by: Yidi Lin <yidilin@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/89410
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Yidi Lin 2025-10-03 13:22:55 +08:00
commit 28a8eaa57b
1 changed files with 1 additions and 18 deletions
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19
src/soc/mediatek/mt8192/include/soc/memlayout.ld
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@ -1,23 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <memlayout.h>
#include <arch/header.ld>
/*
* SRAM_L2C is the half part of L2 cache that we borrow to be used as SRAM.
* It will be returned before starting the ramstage.
* SRAM_L2C and SRAM can be cached, but only SRAM is DMA-able.
*/
#define SRAM_L2C_START(addr) REGION_START(sram_l2c, addr)
#define SRAM_L2C_END(addr) REGION_END(sram_l2c, addr)
#define DRAM_INIT_CODE(addr, size) \
REGION(dram_init_code, addr, size, 64K)
#define DRAM_DMA(addr, size) \
REGION(dram_dma, addr, size, 4K) \
_ = ASSERT(size % 4K == 0, \
"DRAM DMA buffer should be multiple of smallest page size (4K)!");
#include <soc/memlayout.h>
SECTIONS
{