mb/google/nissa/var/gothrax: Tune SX9324 P-sensor configuration

Update SX9324 register settings based on tuning value from SEMTECH.
- Adjust register reg_prox_ctrl0/reg_prox_ctrl6/ph01_proxraw_strength/ph23_proxraw_strength

BUG=b:295109511
BRANCH=None
TEST=Check register settings and confirm P-sensor function can work.

Signed-off-by: Yunlong Jia <yunlong.jia@ecs.corp-partner.google.com>
Change-Id: I1c27360de2d711810abdfd4ec95629ec7bba969b
Reviewed-on: https://review.coreboot.org/c/coreboot/+/86878
Reviewed-by: Eric Lai <ericllai@google.com>
Reviewed-by: Jayvik Desai <jayvik@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Yunlong Jia 2025-03-17 08:58:13 +00:00 committed by Matt DeVillier
commit 286eff6833

View file

@ -287,13 +287,13 @@ chip soc/intel/alderlake
register "reg_afe_ctrl7" = "0x07"
register "reg_afe_ctrl8" = "0x12"
register "reg_afe_ctrl9" = "0x0f"
register "reg_prox_ctrl0" = "0x12"
register "reg_prox_ctrl0" = "0x09"
register "reg_prox_ctrl1" = "0x12"
register "reg_prox_ctrl2" = "0x90"
register "reg_prox_ctrl3" = "0x60"
register "reg_prox_ctrl4" = "0x0c"
register "reg_prox_ctrl5" = "0x12"
register "reg_prox_ctrl6" = "0x3c"
register "reg_prox_ctrl6" = "0x1e"
register "reg_prox_ctrl7" = "0x58"
register "reg_adv_ctrl0" = "0x00"
register "reg_adv_ctrl1" = "0x00"
@ -324,8 +324,8 @@ chip soc/intel/alderlake
register "ph01_resolution" = "512"
register "ph23_resolution" = "1024"
register "startup_sensor" = "1"
register "ph01_proxraw_strength" = "2"
register "ph23_proxraw_strength" = "2"
register "ph01_proxraw_strength" = "1"
register "ph23_proxraw_strength" = "1"
register "avg_pos_strength" = "256"
register "cs_idle_sleep" = ""gnd""
register "int_comp_resistor" = ""lowest""