From 27f3427f4a1dfd2b9a681d9a742894c58a8db08d Mon Sep 17 00:00:00 2001 From: Jayvik Desai Date: Tue, 4 Mar 2025 14:58:23 +0530 Subject: [PATCH] mb/google/fatcat/var/fatcat: Update GSPI0 CS pin for FPS GPP_F18 is currently shared between the fingerprint sensor GSPI0-CS and the touchpad THC1-INT. This commit moves the FPS GSPI0-CS signal to GPP_E17, which is a GSPI-0 CS alternative option and moves the current GSPI0A-CS pin GPP_F18 to not connected. Schematic version dated march'25 has the rework details. BUG=b:395147436 TEST=Build and boot google/fatcat. Able to fetch the FPS version using `ectool --name=cros_fp version` Change-Id: I1131962e9b6423bbf68fb92189b8910eab49645e Signed-off-by: Jayvik Desai Reviewed-on: https://review.coreboot.org/c/coreboot/+/86702 Reviewed-by: Subrata Banik Tested-by: build bot (Jenkins) --- .../google/fatcat/variants/fatcat/fw_config.c | 11 +++++++---- src/mainboard/google/fatcat/variants/fatcat/gpio.c | 2 -- 2 files changed, 7 insertions(+), 6 deletions(-) diff --git a/src/mainboard/google/fatcat/variants/fatcat/fw_config.c b/src/mainboard/google/fatcat/variants/fatcat/fw_config.c index 9419caf709..18163bb63e 100644 --- a/src/mainboard/google/fatcat/variants/fatcat/fw_config.c +++ b/src/mainboard/google/fatcat/variants/fatcat/fw_config.c @@ -477,6 +477,7 @@ static const struct pad_config fp_disable_pads[] = { PAD_NC(GPP_C15, NONE), /* GPP_D01: MOD_TCSS1_TYP_A_VBUS_EN */ PAD_CFG_GPO(GPP_D01, 1, DEEP), + PAD_NC(GPP_E17, NONE), /* FIXME: b/390031369 * use dedicated GPIO PIN for codec enable * when FPS is enabled. @@ -495,6 +496,8 @@ static const struct pad_config fp_enable_pads[] = { PAD_CFG_GPO_LOCK(GPP_C15, 1, LOCK_CONFIG), /* GPP_D01: FPS_SOC_INT_L */ PAD_CFG_GPI_IRQ_WAKE(GPP_D01, NONE, PWROK, LEVEL, INVERT), + /* GPP_E17: GSPI0A_CS0 */ + PAD_CFG_NF(GPP_E17, NONE, DEEP, NF5), /* GPP_E19: FPMCU_PWREN */ PAD_CFG_GPO(GPP_E19, 1, DEEP), /* GPP_E20: FPMCU_FW_UPDATE */ @@ -505,8 +508,8 @@ static const struct pad_config fp_enable_pads[] = { PAD_CFG_NF(GPP_F15, NONE, DEEP, NF8), /* GPP_F16: GPSI0A_CLK */ PAD_CFG_NF(GPP_F16, NONE, DEEP, NF8), - /* GPP_F18: GSPI0A_CS0 */ - PAD_CFG_NF(GPP_F18, NONE, DEEP, NF8), + /* GPP_F18: NC */ + PAD_NC(GPP_F18, NONE), }; static const struct pad_config pre_mem_fp_enable_pads[] = { @@ -645,7 +648,7 @@ void fw_config_gpio_padbased_override(struct pad_config *padbased_table) GPIO_PADBASED_OVERRIDE(padbased_table, peg_x4slot_wake_disable_pads); if (fw_config_probe(FW_CONFIG(FP, FP_PRESENT))) - GPIO_CONFIGURE_PADS(fp_enable_pads); + GPIO_PADBASED_OVERRIDE(padbased_table, fp_enable_pads); else - GPIO_CONFIGURE_PADS(fp_disable_pads); + GPIO_PADBASED_OVERRIDE(padbased_table, fp_disable_pads); } diff --git a/src/mainboard/google/fatcat/variants/fatcat/gpio.c b/src/mainboard/google/fatcat/variants/fatcat/gpio.c index 75c674c70c..b0e08f0859 100644 --- a/src/mainboard/google/fatcat/variants/fatcat/gpio.c +++ b/src/mainboard/google/fatcat/variants/fatcat/gpio.c @@ -222,8 +222,6 @@ static const struct pad_config gpio_table[] = { /* GPP_E16: THC0_SPI1_RST_N_TCH_PNL1 */ /* THC NOTE: use GPO instead of GPO for THC0 Rst */ PAD_CFG_GPO(GPP_E16, 1, DEEP), - /* GPP_E17: THC0_SPI1_CS0_N_TCH_PNL1 */ - PAD_CFG_NF(GPP_E17, NONE, DEEP, NF3), /* GPP_E18: THC0_SPI1_INT_N_TCH_PNL1 */ PAD_CFG_NF(GPP_E18, NONE, DEEP, NF3), /* GPP_E21: I2C_PMC_PD_INT_N */