From 26f437b27e00dbd5c92ea22e76404633a62fb7ca Mon Sep 17 00:00:00 2001
From: Duncan Laurie <dlaurie@chromium.org>
Date: Thu, 1 May 2014 09:18:44 -0700
Subject: [PATCH] broadwell: Split EHCI and XHCI ACPI devices

Move the different USB controller device definitions to
individual ehci.asl and xhci.asl files.

BUG=chrome-os-partner:28234
TEST=None

Change-Id: I61d0caaab968f8b7ce2e261044fe68c04ef9b2f8
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/198899
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
---
 src/soc/intel/broadwell/acpi/ehci.asl | 51 +++++++++++++++++++++++++++
 src/soc/intel/broadwell/acpi/pch.asl  |  7 ++--
 src/soc/intel/broadwell/acpi/xhci.asl | 45 -----------------------
 3 files changed, 56 insertions(+), 47 deletions(-)
 create mode 100644 src/soc/intel/broadwell/acpi/ehci.asl

diff --git a/src/soc/intel/broadwell/acpi/ehci.asl b/src/soc/intel/broadwell/acpi/ehci.asl
new file mode 100644
index 0000000000..a2e704fccf
--- /dev/null
+++ b/src/soc/intel/broadwell/acpi/ehci.asl
@@ -0,0 +1,51 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2014 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+// EHCI Controller 0:1d.0
+
+Device (EHCI)
+{
+	Name(_ADR, 0x001d0000)
+	Name (_PRW, Package(){ 0x6d, 3 })
+
+	// Leave USB ports on for to allow Wake from USB
+
+	Method(_S3D,0)	// Highest D State in S3 State
+	{
+		Return (2)
+	}
+
+	Method(_S4D,0)	// Highest D State in S4 State
+	{
+		Return (2)
+	}
+
+	Device (HUB7)
+	{
+		Name (_ADR, 0x00000000)
+
+		// How many are there?
+		Device (PRT1) { Name (_ADR, 1) } // USB Port 0
+		Device (PRT2) { Name (_ADR, 2) } // USB Port 1
+		Device (PRT3) { Name (_ADR, 3) } // USB Port 2
+		Device (PRT4) { Name (_ADR, 4) } // USB Port 3
+		Device (PRT5) { Name (_ADR, 5) } // USB Port 4
+		Device (PRT6) { Name (_ADR, 6) } // USB Port 5
+	}
+}
diff --git a/src/soc/intel/broadwell/acpi/pch.asl b/src/soc/intel/broadwell/acpi/pch.asl
index f7d2884641..8ea0bda470 100644
--- a/src/soc/intel/broadwell/acpi/pch.asl
+++ b/src/soc/intel/broadwell/acpi/pch.asl
@@ -87,8 +87,11 @@ Scope(\)
 // PCI Express Ports 0:1c.x
 #include "pcie.asl"
 
-// USB 0:1d.0 and 0:1a.0
-#include "usb.asl"
+// USB EHCI 0:1d.0
+#include "ehci.asl"
+
+// USB XHCI 0:14.0
+#include "xhci.asl"
 
 // LPC Bridge 0:1f.0
 #include "lpc.asl"
diff --git a/src/soc/intel/broadwell/acpi/xhci.asl b/src/soc/intel/broadwell/acpi/xhci.asl
index d7b82e32a6..6eb04b92b0 100644
--- a/src/soc/intel/broadwell/acpi/xhci.asl
+++ b/src/soc/intel/broadwell/acpi/xhci.asl
@@ -18,51 +18,6 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  */
 
-/* Intel Cougar Point USB support */
-
-// EHCI Controller 0:1d.0
-
-Device (EHCI)
-{
-	Name(_ADR, 0x001d0000)
-
-	Name (PRWH, Package(){ 0x0d, 3 }) // LPT-H
-	Name (PRWL, Package(){ 0x6d, 3 }) // LPT-LP
-
-	Method (_PRW, 0) { // Power Resources for Wake
-		If (\ISLP ()) {
-			Return (PRWL)
-		} Else {
-			Return (PRWH)
-		}
-	}
-
-	// Leave USB ports on for to allow Wake from USB
-
-	Method(_S3D,0)	// Highest D State in S3 State
-	{
-		Return (2)
-	}
-
-	Method(_S4D,0)	// Highest D State in S4 State
-	{
-		Return (2)
-	}
-
-	Device (HUB7)
-	{
-		Name (_ADR, 0x00000000)
-
-		// How many are there?
-		Device (PRT1) { Name (_ADR, 1) } // USB Port 0
-		Device (PRT2) { Name (_ADR, 2) } // USB Port 1
-		Device (PRT3) { Name (_ADR, 3) } // USB Port 2
-		Device (PRT4) { Name (_ADR, 4) } // USB Port 3
-		Device (PRT5) { Name (_ADR, 5) } // USB Port 4
-		Device (PRT6) { Name (_ADR, 6) } // USB Port 5
-	}
-}
-
 // XHCI Controller 0:14.0
 
 Device (XHCI)